From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C668FC3F68F for ; Sun, 8 Dec 2019 22:08:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9984E20700 for ; Sun, 8 Dec 2019 22:08:10 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=googlemail.com header.i=@googlemail.com header.b="JiUPaF+a" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726799AbfLHWIJ (ORCPT ); Sun, 8 Dec 2019 17:08:09 -0500 Received: from mail-oi1-f194.google.com ([209.85.167.194]:43689 "EHLO mail-oi1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726665AbfLHWIJ (ORCPT ); Sun, 8 Dec 2019 17:08:09 -0500 Received: by mail-oi1-f194.google.com with SMTP id x14so4635240oic.10; Sun, 08 Dec 2019 14:08:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=6LcpecxJCuptWnky/wBInRHW7dBWZyoNDO8ejqGqya4=; b=JiUPaF+aLz6TU175q9IIuAWCfbj1Dp34A44ajwK6wWjJuU4qAW6BB4WFznxCnlrz+m 11aV+yzG5hho4KnFOHqZ4MdNh0vO5men3cU1qp5cZ4yKlf8NYCo/WlL3zH/9Us1l56E2 zaiUI5IFBXi84lF7T6fkfCSTwUxRB+6DMpcPrFgw+839cVtn7VvEd/tz1YJlMGKUMrFv cMVvpXHbsEhI+l1VNNoyP/3w2xVFStHfFJ1IDsQzMBaQj74boPcUBmJpW+MuWdDWAp4S z91RVykEF70X975kRocmzBBOXgC3eOuH0yxBwNCsUrxB0bkqd2TIjaIXJztFPi8M4KID 6zPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=6LcpecxJCuptWnky/wBInRHW7dBWZyoNDO8ejqGqya4=; b=RFKfF3+N3VgeXEAJWocg22vGGkANgCW6zk3A93KeUHfbeZ/OFd5ZUbH45i9Q0oNybe SM6A9TKT3/heLEn5KVBG6bu74Jw+HHe7KY3TaFP/AQUks97W3EeMWtWSlzLM0A8DI+xF GVSxDILmZAciC4J2vkMKcpv/OfEK6XBdlzRozZ0sQ8yOYasnyFq/F215R6cm6z890Lu6 eG/5Tkj0qKBz5tfZS0vL5jPhaZY2ccA/aHRZVB4J7HkYQZ+8mCDynIU6fxgd8/oLzX+l q84o85GFm+R1mxAMiqpjsDkSRLtP5mBw19m4SNYPu4Imxb0m5HKSoA97u6J64CuwbC8y OMsA== X-Gm-Message-State: APjAAAWMJoo2W9LAGWfV6bui17gBqhmP/zf2IKD07K2a0CaQPSOWJJyS VcjB+l4bRf+NdU8gUMLIiPRGklF6qLc+zl7mZQQ= X-Google-Smtp-Source: APXvYqyhNhm0JNicy/loq8RdAT4DHahKdfAG1UNTU2pTEGoRTXZgPhgK9yLqIJ8epqm1nERlorhDJkru2+6iVkzYho0= X-Received: by 2002:a54:401a:: with SMTP id x26mr21795889oie.15.1575842888488; Sun, 08 Dec 2019 14:08:08 -0800 (PST) MIME-Version: 1.0 References: <20191208210320.15539-1-repk@triplefau.lt> <20191208210320.15539-2-repk@triplefau.lt> In-Reply-To: <20191208210320.15539-2-repk@triplefau.lt> From: Martin Blumenstingl Date: Sun, 8 Dec 2019 23:07:57 +0100 Message-ID: Subject: Re: [PATCH 1/2] clk: meson: axg: add pcie pll cml gating To: Remi Pommarel Cc: Neil Armstrong , Jerome Brunet , Kevin Hilman , Yue Wang , Lorenzo Pieralisi , Stephen Boyd , linux-pci@vger.kernel.org, Michael Turquette , linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Remi, On Sun, Dec 8, 2019 at 9:56 PM Remi Pommarel wrote: [...] > +static MESON_GATE(axg_pcie_pll_cml_enable, HHI_MIPI_CNTL0, 26); we already have CLKID_PCIE_CML_EN0 do you know how this new one is related (in terms of clock hierarchy) to the existing one? [...] > --- a/include/dt-bindings/clock/axg-clkc.h > +++ b/include/dt-bindings/clock/axg-clkc.h > @@ -72,5 +72,6 @@ > #define CLKID_PCIE_CML_EN1 80 > #define CLKID_MIPI_ENABLE 81 > #define CLKID_GEN_CLK 84 > +#define CLKID_PCIE_PLL_CML_ENABLE 91 this has to be a separate patch if you want the .dts patch to go into the same cycle the .dts change depends on this one. what we typically do is to apply the dt-bindings patches to a separate clock branch, create an immutable tag and then Kevin pulls that into his dt64 branch. the clock controller changes go into a separate patch in the clk-meson/drivers branch to avoid conflicts with other driver changes Martin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.5 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DB1FC43603 for ; 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Sun, 08 Dec 2019 14:08:08 -0800 (PST) MIME-Version: 1.0 References: <20191208210320.15539-1-repk@triplefau.lt> <20191208210320.15539-2-repk@triplefau.lt> In-Reply-To: <20191208210320.15539-2-repk@triplefau.lt> From: Martin Blumenstingl Date: Sun, 8 Dec 2019 23:07:57 +0100 Message-ID: Subject: Re: [PATCH 1/2] clk: meson: axg: add pcie pll cml gating To: Remi Pommarel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191208_140812_377015_89A962F3 X-CRM114-Status: UNSURE ( 8.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Neil Armstrong , Stephen Boyd , Kevin Hilman , Michael Turquette , linux-kernel@vger.kernel.org, Yue Wang , linux-pci@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jerome Brunet Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Remi, On Sun, Dec 8, 2019 at 9:56 PM Remi Pommarel wrote: [...] > +static MESON_GATE(axg_pcie_pll_cml_enable, HHI_MIPI_CNTL0, 26); we already have CLKID_PCIE_CML_EN0 do you know how this new one is related (in terms of clock hierarchy) to the existing one? [...] > --- a/include/dt-bindings/clock/axg-clkc.h > +++ b/include/dt-bindings/clock/axg-clkc.h > @@ -72,5 +72,6 @@ > #define CLKID_PCIE_CML_EN1 80 > #define CLKID_MIPI_ENABLE 81 > #define CLKID_GEN_CLK 84 > +#define CLKID_PCIE_PLL_CML_ENABLE 91 this has to be a separate patch if you want the .dts patch to go into the same cycle the .dts change depends on this one. what we typically do is to apply the dt-bindings patches to a separate clock branch, create an immutable tag and then Kevin pulls that into his dt64 branch. the clock controller changes go into a separate patch in the clk-meson/drivers branch to avoid conflicts with other driver changes Martin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.5 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDB86C2D0BF for ; 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Sun, 08 Dec 2019 14:08:08 -0800 (PST) MIME-Version: 1.0 References: <20191208210320.15539-1-repk@triplefau.lt> <20191208210320.15539-2-repk@triplefau.lt> In-Reply-To: <20191208210320.15539-2-repk@triplefau.lt> From: Martin Blumenstingl Date: Sun, 8 Dec 2019 23:07:57 +0100 Message-ID: Subject: Re: [PATCH 1/2] clk: meson: axg: add pcie pll cml gating To: Remi Pommarel X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191208_140812_377015_89A962F3 X-CRM114-Status: UNSURE ( 8.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Neil Armstrong , Stephen Boyd , Kevin Hilman , Michael Turquette , linux-kernel@vger.kernel.org, Yue Wang , linux-pci@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Jerome Brunet Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Remi, On Sun, Dec 8, 2019 at 9:56 PM Remi Pommarel wrote: [...] > +static MESON_GATE(axg_pcie_pll_cml_enable, HHI_MIPI_CNTL0, 26); we already have CLKID_PCIE_CML_EN0 do you know how this new one is related (in terms of clock hierarchy) to the existing one? [...] > --- a/include/dt-bindings/clock/axg-clkc.h > +++ b/include/dt-bindings/clock/axg-clkc.h > @@ -72,5 +72,6 @@ > #define CLKID_PCIE_CML_EN1 80 > #define CLKID_MIPI_ENABLE 81 > #define CLKID_GEN_CLK 84 > +#define CLKID_PCIE_PLL_CML_ENABLE 91 this has to be a separate patch if you want the .dts patch to go into the same cycle the .dts change depends on this one. what we typically do is to apply the dt-bindings patches to a separate clock branch, create an immutable tag and then Kevin pulls that into his dt64 branch. the clock controller changes go into a separate patch in the clk-meson/drivers branch to avoid conflicts with other driver changes Martin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic