From mboxrd@z Thu Jan 1 00:00:00 1970 From: Martin Blumenstingl Subject: Re: [PATCH v5 5/6] pinctrl: meson: add support of drive-strength-microamp Date: Sat, 11 May 2019 18:46:19 +0200 Message-ID: References: <20190510082324.21181-1-glaroque@baylibre.com> <20190510082324.21181-6-glaroque@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: In-Reply-To: <20190510082324.21181-6-glaroque@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org To: Guillaume La Roque Cc: linus.walleij@linaro.org, khilman@baylibre.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, jbrunet@baylibre.com List-Id: linux-gpio@vger.kernel.org Hi Guillaume, On Fri, May 10, 2019 at 10:23 AM Guillaume La Roque wrote: > > drive-strength-microamp is a new feature needed for G12A SoC. > the default DS setting after boot is usually 500uA and it is not enough for > many functions. We need to be able to set the drive strength to reliably > enable things like MMC, I2C, etc ... > > Signed-off-by: Guillaume La Roque Reviewed-by: Martin Blumenstingl the warning messages when printing pinconf-pins (in debugfs) are gone on my Meson8m2 board so: Tested-by: Martin Blumenstingl [...] > +static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc, > + unsigned int pin, > + u16 drive_strength_ua) > +{ > + struct meson_bank *bank; > + unsigned int reg, bit, ds_val; > + int ret; > + > + if (!pc->reg_ds) { > + dev_err(pc->dev, "drive-strength not supported\n"); > + return -ENOTSUPP; > + } > + > + ret = meson_get_bank(pc, pin, &bank); > + if (ret) > + return ret; > + > + meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); > + bit = bit << 1; I was confused by this shifting (not sure why I haven't noticed this in earlier revisions). however, it all made sense after I did the maths for two examples: BOOT_0 uses drive-strength register 0x0 bits [1:0] so the result should be "bit = 0" meson_calc_reg_and_bit returns bit = 0 0 << 1 = 0, so this seems right BOOT_15 uses drive-strength register 0x0 bits [31:30] so the result should be "bit = 30" meson_calc_reg_and_bit returns bit = 15 15 << 1 = 30 so all seems fine, even though it wasn't obvious to me at first sight that it's all good Martin From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.7 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF91C04AB1 for ; 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Sat, 11 May 2019 09:46:29 -0700 (PDT) MIME-Version: 1.0 References: <20190510082324.21181-1-glaroque@baylibre.com> <20190510082324.21181-6-glaroque@baylibre.com> In-Reply-To: <20190510082324.21181-6-glaroque@baylibre.com> From: Martin Blumenstingl Date: Sat, 11 May 2019 18:46:19 +0200 Message-ID: Subject: Re: [PATCH v5 5/6] pinctrl: meson: add support of drive-strength-microamp To: Guillaume La Roque X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190511_094630_800345_2E424D66 X-CRM114-Status: UNSURE ( 9.84 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, khilman@baylibre.com, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-amlogic@lists.infradead.org, jbrunet@baylibre.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Guillaume, On Fri, May 10, 2019 at 10:23 AM Guillaume La Roque wrote: > > drive-strength-microamp is a new feature needed for G12A SoC. > the default DS setting after boot is usually 500uA and it is not enough for > many functions. We need to be able to set the drive strength to reliably > enable things like MMC, I2C, etc ... > > Signed-off-by: Guillaume La Roque Reviewed-by: Martin Blumenstingl the warning messages when printing pinconf-pins (in debugfs) are gone on my Meson8m2 board so: Tested-by: Martin Blumenstingl [...] > +static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc, > + unsigned int pin, > + u16 drive_strength_ua) > +{ > + struct meson_bank *bank; > + unsigned int reg, bit, ds_val; > + int ret; > + > + if (!pc->reg_ds) { > + dev_err(pc->dev, "drive-strength not supported\n"); > + return -ENOTSUPP; > + } > + > + ret = meson_get_bank(pc, pin, &bank); > + if (ret) > + return ret; > + > + meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); > + bit = bit << 1; I was confused by this shifting (not sure why I haven't noticed this in earlier revisions). however, it all made sense after I did the maths for two examples: BOOT_0 uses drive-strength register 0x0 bits [1:0] so the result should be "bit = 0" meson_calc_reg_and_bit returns bit = 0 0 << 1 = 0, so this seems right BOOT_15 uses drive-strength register 0x0 bits [31:30] so the result should be "bit = 30" meson_calc_reg_and_bit returns bit = 15 15 << 1 = 30 so all seems fine, even though it wasn't obvious to me at first sight that it's all good Martin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic