From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755488Ab3HLU7P (ORCPT ); Mon, 12 Aug 2013 16:59:15 -0400 Received: from mail-lb0-f169.google.com ([209.85.217.169]:62971 "EHLO mail-lb0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754321Ab3HLU7O (ORCPT ); Mon, 12 Aug 2013 16:59:14 -0400 MIME-Version: 1.0 In-Reply-To: <52093133.9050306@windriver.com> References: <5207B3C3.9080508@roeck-us.net> <20130811220450.GY23006@n2100.arm.linux.org.uk> <52082EF8.10005@roeck-us.net> <52093133.9050306@windriver.com> From: Peter Maydell Date: Mon, 12 Aug 2013 21:58:53 +0100 Message-ID: Subject: Re: SCSI bus failures with qemu-arm in kernel 3.8+ To: Paul Gortmaker Cc: Guenter Roeck , Russell King - ARM Linux , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , qemu-devel@nongnu.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12 August 2013 20:02, Paul Gortmaker wrote: > > If I recall correctly, I'd showed the patch to Russell at the time (via > IRC, I believe) and he'd told me essentially the same thing as the above > paragraph, which is why I didn't put it in the patch system, and why the > commit log of the yocto patch (http://goo.gl/riEZXY) reads as it does > (i.e. it is unclear what the real swizzle is). That patch reads like "make the kernel work with old (pre 1.5) QEMU behaviour" (where every IRQ for every PCI card was always IRQ27). I'm committing to making QEMU continue to support that for backward compatibility, as well as to "work like hardware" (our autodetect hack is based on what the kernel writes to PCI_INTERRUPT_LINE), so in that sense it's a stable and well defined[*] thing to write to, but for mainline I imagine the kernel will want to just go for the 'work on real h/w' approach. [*] by which I mean "not written down outside the QEMU source code but I will write it up if you need it" :-) -- PMM From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56789) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8zCw-0005Jm-Q0 for qemu-devel@nongnu.org; Mon, 12 Aug 2013 16:59:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V8zCs-0006Zw-Gc for qemu-devel@nongnu.org; Mon, 12 Aug 2013 16:59:18 -0400 Received: from mail-la0-f50.google.com ([209.85.215.50]:36163) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8zCs-0006Ze-9x for qemu-devel@nongnu.org; Mon, 12 Aug 2013 16:59:14 -0400 Received: by mail-la0-f50.google.com with SMTP id fn20so5090537lab.23 for ; Mon, 12 Aug 2013 13:59:13 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <52093133.9050306@windriver.com> References: <5207B3C3.9080508@roeck-us.net> <20130811220450.GY23006@n2100.arm.linux.org.uk> <52082EF8.10005@roeck-us.net> <52093133.9050306@windriver.com> From: Peter Maydell Date: Mon, 12 Aug 2013 21:58:53 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] SCSI bus failures with qemu-arm in kernel 3.8+ List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Gortmaker Cc: qemu-devel@nongnu.org, Russell King - ARM Linux , "linux-arm-kernel@lists.infradead.org" , Guenter Roeck , "linux-kernel@vger.kernel.org" On 12 August 2013 20:02, Paul Gortmaker wrote: > > If I recall correctly, I'd showed the patch to Russell at the time (via > IRC, I believe) and he'd told me essentially the same thing as the above > paragraph, which is why I didn't put it in the patch system, and why the > commit log of the yocto patch (http://goo.gl/riEZXY) reads as it does > (i.e. it is unclear what the real swizzle is). That patch reads like "make the kernel work with old (pre 1.5) QEMU behaviour" (where every IRQ for every PCI card was always IRQ27). I'm committing to making QEMU continue to support that for backward compatibility, as well as to "work like hardware" (our autodetect hack is based on what the kernel writes to PCI_INTERRUPT_LINE), so in that sense it's a stable and well defined[*] thing to write to, but for mainline I imagine the kernel will want to just go for the 'work on real h/w' approach. [*] by which I mean "not written down outside the QEMU source code but I will write it up if you need it" :-) -- PMM From mboxrd@z Thu Jan 1 00:00:00 1970 From: peter.maydell@linaro.org (Peter Maydell) Date: Mon, 12 Aug 2013 21:58:53 +0100 Subject: SCSI bus failures with qemu-arm in kernel 3.8+ In-Reply-To: <52093133.9050306@windriver.com> References: <5207B3C3.9080508@roeck-us.net> <20130811220450.GY23006@n2100.arm.linux.org.uk> <52082EF8.10005@roeck-us.net> <52093133.9050306@windriver.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 12 August 2013 20:02, Paul Gortmaker wrote: > > If I recall correctly, I'd showed the patch to Russell at the time (via > IRC, I believe) and he'd told me essentially the same thing as the above > paragraph, which is why I didn't put it in the patch system, and why the > commit log of the yocto patch (http://goo.gl/riEZXY) reads as it does > (i.e. it is unclear what the real swizzle is). That patch reads like "make the kernel work with old (pre 1.5) QEMU behaviour" (where every IRQ for every PCI card was always IRQ27). I'm committing to making QEMU continue to support that for backward compatibility, as well as to "work like hardware" (our autodetect hack is based on what the kernel writes to PCI_INTERRUPT_LINE), so in that sense it's a stable and well defined[*] thing to write to, but for mainline I imagine the kernel will want to just go for the 'work on real h/w' approach. [*] by which I mean "not written down outside the QEMU source code but I will write it up if you need it" :-) -- PMM