From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42876) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUHvc-0002Kn-RQ for qemu-devel@nongnu.org; Wed, 17 Sep 2014 12:18:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XUHvX-0005Mh-UQ for qemu-devel@nongnu.org; Wed, 17 Sep 2014 12:18:00 -0400 Received: from mail-lb0-f182.google.com ([209.85.217.182]:35010) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XUHvX-0005M8-NM for qemu-devel@nongnu.org; Wed, 17 Sep 2014 12:17:55 -0400 Received: by mail-lb0-f182.google.com with SMTP id u10so2096971lbd.41 for ; Wed, 17 Sep 2014 09:17:51 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <5419AEF3.8010101@suse.de> References: <1409930126-28449-1-git-send-email-ard.biesheuvel@linaro.org> <1409930126-28449-5-git-send-email-ard.biesheuvel@linaro.org> <5419AEF3.8010101@suse.de> From: Peter Maydell Date: Wed, 17 Sep 2014 09:17:31 -0700 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 4/6] hw/arm/boot: register cpu reset handlers if using -bios List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Andreas_F=C3=A4rber?= Cc: Fu Wei , QEMU Developers , Christoffer Dall , Ard Biesheuvel On 17 September 2014 08:55, Andreas F=C3=A4rber wrote: > IIRC each machine is responsible for registering a reset hook that calls > - in most cases - cpu_reset(). > > The thing to look out for here is, does any machine already register a > reset hook and would reset twice with this patch? Probably not -- any such double-reset would already be happening if the user passed -kernel. So in that sense this patch won't break things, but I wasn't sure if it's the right direction to go -- should we be fixing all the board and/or SoC models to do the CPU reset instead? QOM devices get reset when their bus gets reset, right? (so everything on a bus gets reset eventually as part of the process that starts when the top level sysbus gets reset). > What's the issue with v7-M? Probably also broken, but IIRC we don't actually wire up the register that's supposed to trigger a system reset... -- PMM