From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41268) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YEh2t-0004wK-N8 for qemu-devel@nongnu.org; Fri, 23 Jan 2015 11:25:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YEh2o-0006OH-Tg for qemu-devel@nongnu.org; Fri, 23 Jan 2015 11:25:19 -0500 Received: from mail-lb0-f182.google.com ([209.85.217.182]:37837) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YEh2o-0006O7-Mz for qemu-devel@nongnu.org; Fri, 23 Jan 2015 11:25:14 -0500 Received: by mail-lb0-f182.google.com with SMTP id l4so7857936lbv.13 for ; Fri, 23 Jan 2015 08:25:14 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1422029835-4696-4-git-send-email-greg.bellows@linaro.org> References: <1422029835-4696-1-git-send-email-greg.bellows@linaro.org> <1422029835-4696-4-git-send-email-greg.bellows@linaro.org> From: Peter Maydell Date: Fri, 23 Jan 2015 16:24:53 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH V2 3/4] target-arm: Change reset to highest available EL List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Greg Bellows Cc: QEMU Developers On 23 January 2015 at 16:17, Greg Bellows wrote: > Update to arm_cpu_reset() to reset into the highest available exception level > based on the set ARM features. > > Signed-off-by: Greg Bellows > > --- > > v1 -> v2 > - Added Linux boot into secure EL1 > - Added reset to EL2 if enabled > - Removed extraneous SCR.NS reset > - Fixed incorrect feature check > --- > hw/arm/boot.c | 22 ++++++++++++++++++++-- > target-arm/cpu.c | 9 ++++++++- Reviewed-by: Peter Maydell thanks -- PMM