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From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH v3 08/13] target/avr: Advance pc in avr_tr_breakpoint_check
Date: Sun, 18 Jul 2021 00:33:40 +0100	[thread overview]
Message-ID: <CAFEAcA-XAWWBGYLDfiZA5nGNrUZO7ZXkrw0MG2BLAXsyUFgvXQ@mail.gmail.com> (raw)
In-Reply-To: <20210717221851.2124573-9-richard.henderson@linaro.org>

On Sat, 17 Jul 2021 at 23:18, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Since 0b00b0c1e05b, tb->size must not be zero.
> Advance pc so that the breakpoint covers the insn at the bp.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/avr/translate.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target/avr/translate.c b/target/avr/translate.c
> index 8237a03c23..d768063d65 100644
> --- a/target/avr/translate.c
> +++ b/target/avr/translate.c
> @@ -2950,6 +2950,7 @@ static bool avr_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *cs,
>      DisasContext *ctx = container_of(dcbase, DisasContext, base);
>
>      gen_breakpoint(ctx);
> +    ctx->base.pc_next += 2; /* advance by minimum insn len so tb->size != 0 */
>      return true;
>  }

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM


  reply	other threads:[~2021-07-17 23:35 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-17 22:18 [PATCH v3 00/13] tcg: breakpoint reorg Richard Henderson
2021-07-17 22:18 ` [PATCH v3 01/13] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS Richard Henderson
2021-07-17 23:33   ` Peter Maydell
2021-07-17 22:18 ` [PATCH v3 02/13] accel/tcg: Move curr_cflags into cpu-exec.c Richard Henderson
2021-07-19 22:06   ` Philippe Mathieu-Daudé
2021-07-17 22:18 ` [PATCH v3 03/13] accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR Richard Henderson
2021-07-17 22:18 ` [PATCH v3 04/13] accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain Richard Henderson
2021-07-17 22:18 ` [PATCH v3 05/13] accel/tcg: Handle -singlestep in curr_cflags Richard Henderson
2021-07-17 22:18 ` [PATCH v3 06/13] accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic Richard Henderson
2021-07-17 22:18 ` [PATCH v3 07/13] accel/tcg: Move cflags lookup into tb_find Richard Henderson
2021-07-19 16:47   ` Alex Bennée
2021-07-17 22:18 ` [PATCH v3 08/13] target/avr: Advance pc in avr_tr_breakpoint_check Richard Henderson
2021-07-17 23:33   ` Peter Maydell [this message]
2021-07-18  7:54   ` Philippe Mathieu-Daudé
2021-07-19  9:35   ` Philippe Mathieu-Daudé
2021-07-17 22:18 ` [PATCH v3 09/13] target/mips: Reduce mips_tr_breakpoint_check pc advance to 2 Richard Henderson
2021-07-17 23:33   ` Peter Maydell
2021-07-18  7:53   ` Philippe Mathieu-Daudé
2021-07-17 22:18 ` [PATCH v3 10/13] target/riscv: Reduce riscv_tr_breakpoint_check " Richard Henderson
2021-07-17 23:35   ` Peter Maydell
2021-07-18 18:02     ` Richard Henderson
2021-07-18 18:16       ` Peter Maydell
2021-07-18 18:50         ` Richard Henderson
2021-07-17 22:18 ` [PATCH v3 11/13] accel/tcg: Adjust interface of TranslatorOps.breakpoint_check Richard Henderson
2021-07-17 22:18 ` [PATCH v3 12/13] accel/tcg: Hoist tb_cflags to a local in translator_loop Richard Henderson
2021-07-17 22:18 ` [PATCH v3 13/13] accel/tcg: Encode breakpoint info into tb->cflags Richard Henderson
2021-07-19 10:30   ` Peter Maydell

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