From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Maydell Subject: Re: [PATCH v9 3/6] target-arm: kvm - support for single step Date: Fri, 20 Nov 2015 15:30:34 +0000 Message-ID: References: <1447345251-22625-1-git-send-email-alex.bennee@linaro.org> <1447345251-22625-4-git-send-email-alex.bennee@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: QEMU Developers , qemu-arm@nongnu.org, Christoffer Dall , Zhichao Huang , kvm-devel , arm-mail-list , "kvmarm@lists.cs.columbia.edu" , Marc Zyngier , Paolo Bonzini To: =?UTF-8?B?QWxleCBCZW5uw6ll?= Return-path: Received: from mail-yk0-f171.google.com ([209.85.160.171]:33413 "EHLO mail-yk0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759362AbbKTPay convert rfc822-to-8bit (ORCPT ); Fri, 20 Nov 2015 10:30:54 -0500 Received: by ykdv3 with SMTP id v3so167660343ykd.0 for ; Fri, 20 Nov 2015 07:30:54 -0800 (PST) In-Reply-To: <1447345251-22625-4-git-send-email-alex.bennee@linaro.org> Sender: kvm-owner@vger.kernel.org List-ID: On 12 November 2015 at 16:20, Alex Benn=C3=A9e = wrote: > This adds support for single-step. There isn't much to do on the QEMU > side as after we set-up the request for single step via the debug ioc= tl > it is all handled within the kernel. > > Signed-off-by: Alex Benn=C3=A9e > > --- > v2 > - convert to using HSR_EC > v3 > - use internals.h definitions > --- > target-arm/kvm.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/target-arm/kvm.c b/target-arm/kvm.c > index 50f70ef..d505a7e 100644 > --- a/target-arm/kvm.c > +++ b/target-arm/kvm.c > @@ -535,6 +535,13 @@ static int kvm_handle_debug(CPUState *cs, struct= kvm_run *run) > kvm_cpu_synchronize_state(cs); > > switch (hsr_ec) { > + case EC_SOFTWARESTEP: > + if (cs->singlestep_enabled) { > + return true; > + } else { > + error_report("Came out of SINGLE STEP when not enabled")= ; > + } > + break; > case EC_AA64_BKPT: > if (kvm_find_sw_breakpoint(cs, env->pc)) { > return true; > @@ -595,6 +602,9 @@ int kvm_arch_on_sigbus(int code, void *addr) > > void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debu= g *dbg) > { > + if (cs->singlestep_enabled) { > + dbg->control |=3D KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLES= TEP; > + } Doesn't kvm_update_guest_debug() already set these bits, or am I misreading it? > if (kvm_sw_breakpoints_active(cs)) { > dbg->control |=3D KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_= BP; > } > -- > 2.6.3 thanks -- PMM From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZzneJ-0003wC-ON for qemu-devel@nongnu.org; Fri, 20 Nov 2015 10:30:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZzneI-0002cg-Ge for qemu-devel@nongnu.org; Fri, 20 Nov 2015 10:30:55 -0500 Received: from mail-yk0-x22a.google.com ([2607:f8b0:4002:c07::22a]:36697) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZzneI-0002cb-A4 for qemu-devel@nongnu.org; Fri, 20 Nov 2015 10:30:54 -0500 Received: by ykdr82 with SMTP id r82so166758480ykd.3 for ; Fri, 20 Nov 2015 07:30:54 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1447345251-22625-4-git-send-email-alex.bennee@linaro.org> References: <1447345251-22625-1-git-send-email-alex.bennee@linaro.org> <1447345251-22625-4-git-send-email-alex.bennee@linaro.org> From: Peter Maydell Date: Fri, 20 Nov 2015 15:30:34 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH v9 3/6] target-arm: kvm - support for single step List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?B?QWxleCBCZW5uw6ll?= Cc: kvm-devel , Marc Zyngier , QEMU Developers , qemu-arm@nongnu.org, Christoffer Dall , Zhichao Huang , Paolo Bonzini , "kvmarm@lists.cs.columbia.edu" , arm-mail-list On 12 November 2015 at 16:20, Alex Benn=C3=A9e wro= te: > This adds support for single-step. There isn't much to do on the QEMU > side as after we set-up the request for single step via the debug ioctl > it is all handled within the kernel. > > Signed-off-by: Alex Benn=C3=A9e > > --- > v2 > - convert to using HSR_EC > v3 > - use internals.h definitions > --- > target-arm/kvm.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/target-arm/kvm.c b/target-arm/kvm.c > index 50f70ef..d505a7e 100644 > --- a/target-arm/kvm.c > +++ b/target-arm/kvm.c > @@ -535,6 +535,13 @@ static int kvm_handle_debug(CPUState *cs, struct kvm= _run *run) > kvm_cpu_synchronize_state(cs); > > switch (hsr_ec) { > + case EC_SOFTWARESTEP: > + if (cs->singlestep_enabled) { > + return true; > + } else { > + error_report("Came out of SINGLE STEP when not enabled"); > + } > + break; > case EC_AA64_BKPT: > if (kvm_find_sw_breakpoint(cs, env->pc)) { > return true; > @@ -595,6 +602,9 @@ int kvm_arch_on_sigbus(int code, void *addr) > > void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *d= bg) > { > + if (cs->singlestep_enabled) { > + dbg->control |=3D KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP; > + } Doesn't kvm_update_guest_debug() already set these bits, or am I misreading it? > if (kvm_sw_breakpoints_active(cs)) { > dbg->control |=3D KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; > } > -- > 2.6.3 thanks -- PMM From mboxrd@z Thu Jan 1 00:00:00 1970 From: peter.maydell@linaro.org (Peter Maydell) Date: Fri, 20 Nov 2015 15:30:34 +0000 Subject: [PATCH v9 3/6] target-arm: kvm - support for single step In-Reply-To: <1447345251-22625-4-git-send-email-alex.bennee@linaro.org> References: <1447345251-22625-1-git-send-email-alex.bennee@linaro.org> <1447345251-22625-4-git-send-email-alex.bennee@linaro.org> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On 12 November 2015 at 16:20, Alex Benn?e wrote: > This adds support for single-step. There isn't much to do on the QEMU > side as after we set-up the request for single step via the debug ioctl > it is all handled within the kernel. > > Signed-off-by: Alex Benn?e > > --- > v2 > - convert to using HSR_EC > v3 > - use internals.h definitions > --- > target-arm/kvm.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/target-arm/kvm.c b/target-arm/kvm.c > index 50f70ef..d505a7e 100644 > --- a/target-arm/kvm.c > +++ b/target-arm/kvm.c > @@ -535,6 +535,13 @@ static int kvm_handle_debug(CPUState *cs, struct kvm_run *run) > kvm_cpu_synchronize_state(cs); > > switch (hsr_ec) { > + case EC_SOFTWARESTEP: > + if (cs->singlestep_enabled) { > + return true; > + } else { > + error_report("Came out of SINGLE STEP when not enabled"); > + } > + break; > case EC_AA64_BKPT: > if (kvm_find_sw_breakpoint(cs, env->pc)) { > return true; > @@ -595,6 +602,9 @@ int kvm_arch_on_sigbus(int code, void *addr) > > void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) > { > + if (cs->singlestep_enabled) { > + dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP; > + } Doesn't kvm_update_guest_debug() already set these bits, or am I misreading it? > if (kvm_sw_breakpoints_active(cs)) { > dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; > } > -- > 2.6.3 thanks -- PMM