From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35096) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1HAW-0004DG-Qu for qemu-devel@nongnu.org; Mon, 22 Jul 2013 10:33:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1HAU-0003II-Hs for qemu-devel@nongnu.org; Mon, 22 Jul 2013 10:32:56 -0400 Received: from mail-la0-f51.google.com ([209.85.215.51]:39054) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1HAU-0003Hp-B5 for qemu-devel@nongnu.org; Mon, 22 Jul 2013 10:32:54 -0400 Received: by mail-la0-f51.google.com with SMTP id ga9so3529809lab.38 for ; Mon, 22 Jul 2013 07:32:53 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1374501278-31549-1-git-send-email-pbonzini@redhat.com> References: <1374501278-31549-1-git-send-email-pbonzini@redhat.com> From: Peter Maydell Date: Mon, 22 Jul 2013 15:32:33 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH 00/28] Memory API for 1.6: fix I/O port endianness mess List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: aliguori@us.ibm.com, aik@ozlabs.ru, jan.kiszka@siemens.com, qemu-devel@nongnu.org, agraf@suse.de, hpoussin@reactos.org, aurelien@aurel32.net On 22 July 2013 14:54, Paolo Bonzini wrote: > This series drops isa_mmio and replace it with an alias of the > root I/O memory region. After applying back the LITTLE_ENDIAN > mark for PortioLists, everything works as expected: the port memory > regions appear directly in the FlatView with the right endianness, > and MMIO is dispatched straight to them. In the long term it would be good to identify which boards were using isa_mmio purely for the benefit of old_portio (which I think is basically "boards where the CPU has no concept of port I/O instructions"). In these cases there should be nobody calling cpu_in/out* any more, and so the 'system io space' returned by get_system_io() has devolved to just being used as a container corresponding to the PCI IO address space (which is then mapped into the system MMIO space somewhere). This can be replaced by having the PCI bridge device create a container space specifically to be the IO address space. (This is how hw/pci-host/versatile.c does it, for example). That's longer term and not 1.6 material though. thanks -- PMM