From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50786) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YlL9E-0007os-RD for qemu-devel@nongnu.org; Thu, 23 Apr 2015 13:42:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YlL9A-0006vg-QH for qemu-devel@nongnu.org; Thu, 23 Apr 2015 13:42:48 -0400 Received: from mail-ig0-f174.google.com ([209.85.213.174]:35167) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YlL9A-0006va-Ku for qemu-devel@nongnu.org; Thu, 23 Apr 2015 13:42:44 -0400 Received: by igbyr2 with SMTP id yr2so30544357igb.0 for ; Thu, 23 Apr 2015 10:42:44 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <3e026b514473978a9a68cf272a24a52c30bed437.1427108387.git.peter.crosthwaite@xilinx.com> References: <3e026b514473978a9a68cf272a24a52c30bed437.1427108387.git.peter.crosthwaite@xilinx.com> From: Peter Maydell Date: Thu, 23 Apr 2015 18:42:24 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH target-arm v4 04/16] arm: Introduce Xilinx ZynqMP SoC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Edgar Iglesias , Ryota Ozaki , michals@xilinx.com, QEMU Developers , zach.pfeffer@xilinx.com On 23 March 2015 at 11:05, Peter Crosthwaite wrote: > With quad Cortex-A53 CPUs. > > Signed-off-by: Peter Crosthwaite > --- > changed since v2: > Added [*] to cpu child property name. > changed since v1: > Add &error_abort to CPU child adder call. > > default-configs/aarch64-softmmu.mak | 2 +- > hw/arm/Makefile.objs | 1 + > hw/arm/xlnx-zynqmp.c | 72 +++++++++++++++++++++++++++++++++++++ > include/hw/arm/xlnx-zynqmp.h | 21 +++++++++++ > 4 files changed, 95 insertions(+), 1 deletion(-) > create mode 100644 hw/arm/xlnx-zynqmp.c > create mode 100644 include/hw/arm/xlnx-zynqmp.h > > diff --git a/default-configs/aarch64-softmmu.mak b/default-configs/aarch64-softmmu.mak > index 6d3b5c7..96dd994 100644 > --- a/default-configs/aarch64-softmmu.mak > +++ b/default-configs/aarch64-softmmu.mak > @@ -3,4 +3,4 @@ > # We support all the 32 bit boards so need all their config > include arm-softmmu.mak > > -# Currently no 64-bit specific config requirements > +CONFIG_XLNX_ZYNQMP=y > diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs > index 2577f68..d7cd5f4 100644 > --- a/hw/arm/Makefile.objs > +++ b/hw/arm/Makefile.objs > @@ -10,3 +10,4 @@ obj-$(CONFIG_DIGIC) += digic.o > obj-y += omap1.o omap2.o strongarm.o > obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o > obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o > +obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o Can this be a common-obj- ? > diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c > new file mode 100644 > index 0000000..41c207a > --- /dev/null > +++ b/hw/arm/xlnx-zynqmp.c > @@ -0,0 +1,72 @@ > +/* > + * Xilinx Zynq MPSoC emulation > + * > + * Copyright (C) 2015 Xilinx Inc > + * Written by Peter Crosthwaite > + * > + * This program is free software; you can redistribute it and/or modify it > + * under the terms of the GNU General Public License as published by the > + * Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, but WITHOUT > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License > + * for more details. > + */ > + > +#include "hw/arm/xlnx-zynqmp.h" > + > +static void xlnx_zynqmp_init(Object *obj) We don't abbreviate 'Xilinx' in existing type and function names, so it's a bit inconsistent to do so here. > +{ > + XlnxZynqMPState *s = XLNX_ZYNQMP(obj); > + int i; > + > + for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) { > + object_initialize(&s->cpu[i], sizeof(s->cpu[i]), > + "cortex-a53-" TYPE_ARM_CPU); > + object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), > + &error_abort); > + } > +} > + > +#define ERR_PROP_CHECK_RETURN(err, errp) do { \ > + if (err) { \ > + error_propagate((errp), (err)); \ > + return; \ > + } \ > +} while (0) I don't think our QOM error handling is so ugly as to justify hiding it behind a macro (particularly not one with hidden control flow). > +static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) > +{ > + XlnxZynqMPState *s = XLNX_ZYNQMP(dev); > + uint8_t i; > + Error *err = NULL; > + > + for (i = 0; i < XLNX_ZYNQMP_NUM_CPUS; i++) { > + object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); > + ERR_PROP_CHECK_RETURN(err, errp); > + } > +} > + > +static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data) > +{ > + DeviceClass *dc = DEVICE_CLASS(oc); > + > + dc->realize = xlnx_zynqmp_realize; > +} > + > +static const TypeInfo xlnx_zynqmp_type_info = { > + .name = TYPE_XLNX_ZYNQMP, > + .parent = TYPE_DEVICE, > + .instance_size = sizeof(XlnxZynqMPState), > + .instance_init = xlnx_zynqmp_init, > + .class_init = xlnx_zynqmp_class_init, > +}; > + > +static void xlnx_zynqmp_register_types(void) > +{ > + type_register_static(&xlnx_zynqmp_type_info); > +} > + > +type_init(xlnx_zynqmp_register_types) > diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h > new file mode 100644 > index 0000000..d6b3b92 > --- /dev/null > +++ b/include/hw/arm/xlnx-zynqmp.h > @@ -0,0 +1,21 @@ This file needs a copyright-and-license comment. > +#ifndef XLNX_ZYNQMP_H_ No trailing underscore, please. > + > +#include "qemu-common.h" > +#include "hw/arm/arm.h" > + > +#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" > +#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ > + TYPE_XLNX_ZYNQMP) > + > +#define XLNX_ZYNQMP_NUM_CPUS 4 > + > +typedef struct XlnxZynqMPState { > + /*< private >*/ > + DeviceState parent_obj; > + /*< public >*/ > + > + ARMCPU cpu[XLNX_ZYNQMP_NUM_CPUS]; > +} XlnxZynqMPState; > + > +#define XLNX_ZYNQMP_H_ > +#endif > -- > 2.3.1.2.g90df61e.dirty > thanks -- PMM