From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47017) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuPEM-0000ca-VC for qemu-devel@nongnu.org; Mon, 18 May 2015 13:53:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YuPEG-0001ff-Q7 for qemu-devel@nongnu.org; Mon, 18 May 2015 13:53:34 -0400 Received: from mail-ig0-f181.google.com ([209.85.213.181]:33810) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuPEG-0001fW-M2 for qemu-devel@nongnu.org; Mon, 18 May 2015 13:53:28 -0400 Received: by igbhj9 with SMTP id hj9so14813163igb.1 for ; Mon, 18 May 2015 10:53:28 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1429722561-12651-1-git-send-email-greg.bellows@linaro.org> References: <1429722561-12651-1-git-send-email-greg.bellows@linaro.org> From: Peter Maydell Date: Mon, 18 May 2015 18:53:07 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v2 0/9] target-arm: EL3 trap support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Greg Bellows Cc: Sergey Fedorov , =?UTF-8?B?QWxleCBCZW5uw6ll?= , QEMU Developers On 22 April 2015 at 18:09, Greg Bellows wrote: > Initial patchset adding support for trapping to an EL other than EL1. Support > includes changes to interfaces to allow specification of the target EL. Also > includes the addition of the ARMv8 CPTR system registers used for controlling > the trapping of features. > > --- > > v1 -> v2 > - Removed use of MAX through out the patch when setting target_el > - Updated FP trap support to pass a target exception EL rather than just an > enable boolean. > - Added utility functions for determining the target exception EL > - Broke up cptr and cpacr access functions > - Added HCPTR CP register entry and HCPTR/CPTR_EL2 zero entries > - Broke out TCR changes into their own patch and added support for handling the > lack of TTBR1 > - Simplified wfx checking > - General comment cleanup > > Greg Bellows (9): > target-arm: Add exception target el infrastructure > target-arm: Extend helpers to route exceptions > target-arm: Update interrupt handling to use target EL > target-arm: Add AArch64 CPTR registers > target-arm: Extend FP checks to use an EL > target-arm: Add TTBR regime function and use > target-arm: Add EL3 and EL2 TCR checking > target-arm: Add WFx syndrome function > target-arm: Add WFx instruction trap support Of this series, patches 1,2,3,6,7,8 look good so I'm applying them to target-arm.next (with the uint64_t fixup Sergey spotted for patch 6). I've sent comments on patches 4 and 5. 9 might be OK but there was enough discussion on it to merit a respin anyway. (Since Greg has moved on from Linaro I will be doing the respin.) thanks -- PMM