From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Maydell Subject: Re: [RFC 0/5] Making KVM_GET_ONE_REG/KVM_SET_ONE_REG generic. Date: Wed, 5 Sep 2012 09:52:57 +0100 Message-ID: References: <877gsia8rm.fsf@rustcorp.com.au> <87627y3p1r.fsf@rustcorp.com.au> <87ipbtj77o.fsf@rustcorp.com.au> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Cc: Rusty Russell , Avi Kivity , Christoffer Dall , Alexander Graf , kvmarm@lists.cs.columbia.edu, kvm-devel To: Rusty Russell Return-path: Received: from mail-ie0-f174.google.com ([209.85.223.174]:55649 "EHLO mail-ie0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750765Ab2IEIxA (ORCPT ); Wed, 5 Sep 2012 04:53:00 -0400 Received: by ieje11 with SMTP id e11so615036iej.19 for ; Wed, 05 Sep 2012 01:52:57 -0700 (PDT) In-Reply-To: <87ipbtj77o.fsf@rustcorp.com.au> Sender: kvm-owner@vger.kernel.org List-ID: On 5 September 2012 07:48, Rusty Russell wrote: > Peter Maydell writes: >> >> This is a problem because it means userspace needs to know the >> size of each register, and the kernel doesn't provide any way >> to determine the size. This defeats the idea that userspace should >> be able to migrate kernel register state without having to know >> the semantics of all the registers involved. > > It's there. There are bits in the id which indicate the size: > And my patches added a helper: > > #define KVM_REG_SIZE(id) \ > (1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT)) Ah, right, I hadn't realised that was in the exposed-to-userspace bit of the code. >> I could live with "always read/write 64 bits". I definitely don't >> want to have to deal with matching up register widths to accesses >> in userspace, please. > > I changed my mind about the old scheme when I realized we have to deal > with 128-bit FPU registers. Mmm, ARM might not have any awkward size registers but there's x86 weirdisms to consider for a generic ABI I guess. -- PMM