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From: Peter Maydell <peter.maydell@linaro.org>
Date: Thu, 7 Jan 2016 10:22:30 +0000
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Subject: Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction
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To: alvise rigo <a.rigo@virtualopensystems.com>
Cc: "mttcg@listserver.greensocs.com" <mttcg@listserver.greensocs.com>, "claudio.fontana@huawei.com" <claudio.fontana@huawei.com>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, Andrew Baumann <Andrew.Baumann@microsoft.com>, "pbonzini@redhat.com" <pbonzini@redhat.com>, "jani.kokkonen@huawei.com" <jani.kokkonen@huawei.com>, "tech@virtualopensystems.com" <tech@virtualopensystems.com>, "alex.bennee@linaro.org" <alex.bennee@linaro.org>, "rth@twiddle.net" <rth@twiddle.net>

On 7 January 2016 at 10:21, alvise rigo <a.rigo@virtualopensystems.com> wrote:
> Hi,
>
> On Wed, Jan 6, 2016 at 7:00 PM, Andrew Baumann
> <Andrew.Baumann@microsoft.com> wrote:
>> As a heads up, we just added support for alignment checks in LDREX:
>> https://github.com/qemu/qemu/commit/30901475b91ef1f46304404ab4bfe89097f61b96

> It should be if we add an aligned variant for each of the exclusive helper.
> BTW, why don't we make the check also for the STREX instruction?

Andrew's patch only changed the bits Windows cares about, I think.
We should indeed extend this to cover also STREX and the A64 instructions
as well, I think.

thanks
-- PMM