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Thu, 26 Aug 2021 06:31:52 -0700 (PDT) MIME-Version: 1.0 References: <20210821195958.41312-1-richard.henderson@linaro.org> <20210821195958.41312-5-richard.henderson@linaro.org> In-Reply-To: <20210821195958.41312-5-richard.henderson@linaro.org> From: Peter Maydell Date: Thu, 26 Aug 2021 14:31:05 +0100 Message-ID: Subject: Re: [PATCH v2 4/8] linux-user/arm: Report SIGBUS and SIGSEGV correctly To: Richard Henderson Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=peter.maydell@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm , QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Sat, 21 Aug 2021 at 21:03, Richard Henderson wrote: > > Pull the fault information from where we placed it, in > arm_cpu_tlb_fill and arm_cpu_do_unaligned_access. > > Signed-off-by: Richard Henderson > --- > Pulled out from the larger unaligned data patch set. > For short-form FSC, pc misalignment is reported in the same way. > --- > linux-user/arm/cpu_loop.c | 39 ++++++++++++++++++++++++++++++++++----- > 1 file changed, 34 insertions(+), 5 deletions(-) > > diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c > + case 0x3: /* Access flag fault, level 1 */ > + case 0x6: /* Access flag fault, level 2 */ > + case 0x9: /* Domain fault, level 1 */ > + case 0xb: /* Domain fault, level 2 */ > + case 0xd: /* Permision fault, level 1 */ > + case 0xf: /* Permision fault, level 2 */ "Permission" > + si_signo = TARGET_SIGSEGV; > + si_code = TARGET_SEGV_ACCERR; > + break; > + case 0x5: /* Translation fault, level 1 */ > + case 0x7: /* Translation fault, level 2 */ > + si_signo = TARGET_SIGSEGV; > + si_code = TARGET_SEGV_MAPERR; > + break; Side note: for cases like this where we can tell MAPERR from ACCERR based on info the exception handler passes to us, should we prefer that or the "check the page flags" approach that force_sigsegv_for_addr() takes ? I feel like the former is nicer, because in a multithreaded program some other thread might have changed whether the page is mapped between our taking the fault and getting here. But maybe that's always racy... Anyway, other than the typo, Reviewed-by: Peter Maydell thanks -- PMM