Re: [Qemu-devel] Cortex-M3: reading NVIC registers causes segfaults

[Peter Maydell <peter.maydell@linaro.org>]

On 17 February 2014 14:52, Andreas Galauner <andreas@galauner.de> wrote:
> I'm currently trying to emulate an ARM Cortex-M3 and I need to debug the
> system using GDB and IDA Pro. The platform is an STM32 and I'm using a
> port from github [1] based on qemu 1.5.1 for that. I ported the custom
> STM32 code to qemu 1.7.0 to have a more recent version to work with.
>
> During a debug session, I'm experiencing segfaults in armv7m_nvic.c when
> reading the CPUID and Vector base registers (lines 176 and 212), because
> ARM_CPU(current_cpu) returns a NULL-pointer. IDA seems to do that quite
> regularly. Debugging with GDB works until you try to read the mentioned
> registers by hand like this:
>
>> (gdb) target remote :1234
>> Remote debugging using :1234
>> 0x08005d1c in ?? ()
>> (gdb) x/x *0xE000ED00
>> Remote connection closed
>
> The original STM32-port was based on qemu 1.5.1 and the behaviour was
> the same. That was the reason why I ported all that stuff over to 1.7.0
> which unfortunately didn't solve the problem.

I don't think I would expect trying to read and write device
registers over the gdbstub to work properly -- gdb kind of
assumes it's talking to memory, which doesn't have side
effects the way devices do.

The crash you're running into is caused by the device code assuming
that it's only ever accessed by a CPU, not by some other thing like
a debugger or DMA access. For the NVIC code in armv7m_nvic.c we
know that a v7M CPU has only one core, so you should just be able
to replace the uses of "current_cpu" with "first_cpu". Other
places which use current_cpu (such as the GIC proper) might be
shared with configurations which do have multiple cores and so
really do need current_cpu.

thanks
-- PMM