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From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH for-2.13] tcg: Allow wider vectors for cmp and mul
Date: Thu, 19 Apr 2018 18:34:42 +0100	[thread overview]
Message-ID: <CAFEAcA8R9nSGaXb8SGQ-RZqOBgJ6ysVaDEc8MV80SJGGfVaj+w@mail.gmail.com> (raw)
In-Reply-To: <c97f1392-570c-b3a2-1a2f-a223349b965e@linaro.org>

On 19 April 2018 at 18:32, Richard Henderson
<richard.henderson@linaro.org> wrote:
> On 04/19/2018 12:17 AM, Peter Maydell wrote:
>> On 17 April 2018 at 23:12, Richard Henderson
>> <richard.henderson@linaro.org> wrote:
>>> In db432672, we allow wide inputs for operations such as add.
>>> However, in 212be173 and 3774030a we didn't do the same for
>>> compare and multiply.
>>>
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>
>> Can we hit these asserts in the uses of tcg_gen_mul_vec
>> and tcg_gen_cmp_vec currently in the aarch64 frontend, or
>> is this only a problem for the not-yet-landed SVE code?
>
> Only sve code -- it requires a VQ that is not a power of 2, e.g. 3.
>
>> I notice that do_shifti() also has a
>>     tcg_debug_assert(at->base_type == type);
>> Is that assert correct, or should it also be changed to >= ?
>
> I think that one is correct.  This assert is hit for something like
>
>         mul     z3, z2, z1[0]
>
> where we dup the scalar to our widest host vector width and then multiply.  In
> the case of VQ=3, the dup might be to v256, one v256 multiply, and one v128
> multiply.

Cool. In that case

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

      reply	other threads:[~2018-04-19 17:35 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-17 22:12 [Qemu-devel] [PATCH for-2.13] tcg: Allow wider vectors for cmp and mul Richard Henderson
2018-04-19 10:17 ` Peter Maydell
2018-04-19 17:32   ` Richard Henderson
2018-04-19 17:34     ` Peter Maydell [this message]

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