From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:50561) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R24EU-0002Xr-Tc for qemu-devel@nongnu.org; Fri, 09 Sep 2011 12:47:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R24ET-0008Ri-TX for qemu-devel@nongnu.org; Fri, 09 Sep 2011 12:47:14 -0400 Received: from mail-pz0-f42.google.com ([209.85.210.42]:37325) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R24ET-0008RR-Ox for qemu-devel@nongnu.org; Fri, 09 Sep 2011 12:47:13 -0400 Received: by pzk37 with SMTP id 37so3316736pzk.29 for ; Fri, 09 Sep 2011 09:47:12 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1314295174-20350-1-git-send-email-peter.maydell@linaro.org> References: <1314295174-20350-1-git-send-email-peter.maydell@linaro.org> Date: Fri, 9 Sep 2011 17:47:11 +0100 Message-ID: From: Peter Maydell Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] hw/lan9118.c: Convert to MemoryRegion List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Avi Kivity , patches@linaro.org Ping? On 25 August 2011 18:59, Peter Maydell wrote: > Signed-off-by: Peter Maydell > --- > Another device I needed to convert so I could connect it to omap_gpmc > for an omap3 board (in this case overo). > > =C2=A0hw/lan9118.c | =C2=A0 29 +++++++++++------------------ > =C2=A01 files changed, 11 insertions(+), 18 deletions(-) > > diff --git a/hw/lan9118.c b/hw/lan9118.c > index 73a8661..634b88e 100644 > --- a/hw/lan9118.c > +++ b/hw/lan9118.c > @@ -152,7 +152,7 @@ typedef struct { > =C2=A0 =C2=A0 NICState *nic; > =C2=A0 =C2=A0 NICConf conf; > =C2=A0 =C2=A0 qemu_irq irq; > - =C2=A0 =C2=A0int mmio_index; > + =C2=A0 =C2=A0MemoryRegion mmio; > =C2=A0 =C2=A0 ptimer_state *timer; > > =C2=A0 =C2=A0 uint32_t irq_cfg; > @@ -895,7 +895,7 @@ static void lan9118_tick(void *opaque) > =C2=A0} > > =C2=A0static void lan9118_writel(void *opaque, target_phys_addr_t offset, > - =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 uint32_t val) > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 uint64_t val, unsigned size) > =C2=A0{ > =C2=A0 =C2=A0 lan9118_state *s =3D (lan9118_state *)opaque; > =C2=A0 =C2=A0 offset &=3D 0xff; > @@ -1022,13 +1022,14 @@ static void lan9118_writel(void *opaque, target_p= hys_addr_t offset, > =C2=A0 =C2=A0 =C2=A0 =C2=A0 break; > > =C2=A0 =C2=A0 default: > - =C2=A0 =C2=A0 =C2=A0 =C2=A0hw_error("lan9118_write: Bad reg 0x%x =3D %x= \n", (int)offset, val); > + =C2=A0 =C2=A0 =C2=A0 =C2=A0hw_error("lan9118_write: Bad reg 0x%x =3D %x= \n", (int)offset, (int)val); > =C2=A0 =C2=A0 =C2=A0 =C2=A0 break; > =C2=A0 =C2=A0 } > =C2=A0 =C2=A0 lan9118_update(s); > =C2=A0} > > -static uint32_t lan9118_readl(void *opaque, target_phys_addr_t offset) > +static uint64_t lan9118_readl(void *opaque, target_phys_addr_t offset, > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned size) > =C2=A0{ > =C2=A0 =C2=A0 lan9118_state *s =3D (lan9118_state *)opaque; > > @@ -1101,16 +1102,10 @@ static uint32_t lan9118_readl(void *opaque, targe= t_phys_addr_t offset) > =C2=A0 =C2=A0 return 0; > =C2=A0} > > -static CPUReadMemoryFunc * const lan9118_readfn[] =3D { > - =C2=A0 =C2=A0lan9118_readl, > - =C2=A0 =C2=A0lan9118_readl, > - =C2=A0 =C2=A0lan9118_readl > -}; > - > -static CPUWriteMemoryFunc * const lan9118_writefn[] =3D { > - =C2=A0 =C2=A0lan9118_writel, > - =C2=A0 =C2=A0lan9118_writel, > - =C2=A0 =C2=A0lan9118_writel > +static const MemoryRegionOps lan9118_mem_ops =3D { > + =C2=A0 =C2=A0.read =3D lan9118_readl, > + =C2=A0 =C2=A0.write =3D lan9118_writel, > + =C2=A0 =C2=A0.endianness =3D DEVICE_NATIVE_ENDIAN, > =C2=A0}; > > =C2=A0static void lan9118_cleanup(VLANClientState *nc) > @@ -1135,10 +1130,8 @@ static int lan9118_init1(SysBusDevice *dev) > =C2=A0 =C2=A0 QEMUBH *bh; > =C2=A0 =C2=A0 int i; > > - =C2=A0 =C2=A0s->mmio_index =3D cpu_register_io_memory(lan9118_readfn, > - =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 lan9118_writefn, s, > - =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 DEVICE_NATIVE_ENDIAN); > - =C2=A0 =C2=A0sysbus_init_mmio(dev, 0x100, s->mmio_index); > + =C2=A0 =C2=A0memory_region_init_io(&s->mmio, &lan9118_mem_ops, s, "lan9= 118-mmio", 0x100); > + =C2=A0 =C2=A0sysbus_init_mmio_region(dev, &s->mmio); > =C2=A0 =C2=A0 sysbus_init_irq(dev, &s->irq); > =C2=A0 =C2=A0 qemu_macaddr_default_if_unset(&s->conf.macaddr); > > -- > 1.7.1