From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42393) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XLtLP-0003Wq-OP for qemu-devel@nongnu.org; Mon, 25 Aug 2014 08:26:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XLtLI-00009W-Eu for qemu-devel@nongnu.org; Mon, 25 Aug 2014 08:25:55 -0400 Received: from mail-la0-f42.google.com ([209.85.215.42]:39699) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XLtLI-00009B-7T for qemu-devel@nongnu.org; Mon, 25 Aug 2014 08:25:48 -0400 Received: by mail-la0-f42.google.com with SMTP id pv20so12808720lab.15 for ; Mon, 25 Aug 2014 05:25:47 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <53FAFEEA.2090009@gmail.com> References: <1408703392-23893-1-git-send-email-aggelerf@ethz.ch> <1408703392-23893-2-git-send-email-aggelerf@ethz.ch> <53FAFEEA.2090009@gmail.com> From: Peter Maydell Date: Mon, 25 Aug 2014 13:25:27 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH 01/15] hw/intc/arm_gic: Request FIQ sources List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Fedorov Cc: Fabian Aggeler , "Edgar E. Iglesias" , QEMU Developers , Christoffer Dall , Greg Bellows On 25 August 2014 10:16, Sergey Fedorov wrote: > On 22.08.2014 14:29, Fabian Aggeler wrote: >> Preparing for FIQ lines from GIC to CPUs, which is needed for GIC >> Security Extensions. >> >> Signed-off-by: Fabian Aggeler >> --- >> hw/intc/arm_gic.c | 3 +++ >> include/hw/intc/arm_gic_common.h | 1 + >> 2 files changed, 4 insertions(+) >> >> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c >> index 1532ef9..b27bd0e 100644 >> --- a/hw/intc/arm_gic.c >> +++ b/hw/intc/arm_gic.c >> @@ -786,6 +786,9 @@ void gic_init_irqs_and_distributor(GICState *s, int num_irq) >> for (i = 0; i < NUM_CPU(s); i++) { >> sysbus_init_irq(sbd, &s->parent_irq[i]); >> } >> + for (i = 0; i < NUM_CPU(s); i++) { >> + sysbus_init_irq(sbd, &s->parent_fiq[i]); >> + } > > Hi Fabian, > > I would suggest to provide a way to get a sysbus IRQ/FIQ number for each > processor, e.g. a dedicated macro. Maybe it could be easier to > accomplish this by initializing IRQ and FIQ interleaved or by always > initializing GIC_NCPU IRQs/FIQs. Using named GPIO registers is the way to go here, or at least it will be once Peter C's patchset to make sysbus IRQs just be legacy syntax for GPIOs goes in. -- PMM