From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: Re: [PULL 00/15] target-arm queue
Date: Mon, 18 Jul 2022 17:47:48 +0100 [thread overview]
Message-ID: <CAFEAcA8ajBC=O=erD-9GBMXO49b6731ApAZKceMV4mUsfq4G3w@mail.gmail.com> (raw)
In-Reply-To: <20220718135920.13667-1-peter.maydell@linaro.org>
On Mon, 18 Jul 2022 at 14:59, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Some arm patches before softfreeze. These are all bug fixes.
>
> -- PMM
>
> The following changes since commit 0ebf76aae58324b8f7bf6af798696687f5f4c2a9:
>
> Merge tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nvme into staging (2022-07-15 15:38:13 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20220718
>
> for you to fetch changes up to 004c8a8bc569c8b18fca6fc90ffe3223daaf17b7:
>
> Align Raspberry Pi DMA interrupts with Linux DTS (2022-07-18 13:25:13 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * hw/intc/armv7m_nvic: ICPRn must not unpend an IRQ that is being held high
> * target/arm: Fill in VL for tbflags when SME enabled and SVE disabled
> * target/arm: Fix aarch64_sve_change_el for SME
> * linux-user/aarch64: Do not clear PROT_MTE on mprotect
> * target/arm: Honour VTCR_EL2 bits in Secure EL2
> * hw/adc: Fix CONV bit in NPCM7XX ADC CON register
> * hw/adc: Make adci[*] R/W in NPCM7XX ADC
> * target/arm: Don't set syndrome ISS for loads and stores with writeback
> * Align Raspberry Pi DMA interrupts with Linux DTS
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.1
for any user-visible changes.
-- PMM
next prev parent reply other threads:[~2022-07-18 16:49 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-18 13:59 [PULL 00/15] target-arm queue Peter Maydell
2022-07-18 13:59 ` [PULL 01/15] hw/intc/armv7m_nvic: ICPRn must not unpend an IRQ that is being held high Peter Maydell
2022-07-18 13:59 ` [PULL 02/15] target/arm: Fill in VL for tbflags when SME enabled and SVE disabled Peter Maydell
2022-07-18 13:59 ` [PULL 03/15] target/arm: Fix aarch64_sve_change_el for SME Peter Maydell
2022-07-18 13:59 ` [PULL 04/15] linux-user/aarch64: Do not clear PROT_MTE on mprotect Peter Maydell
2022-07-18 13:59 ` [PULL 05/15] target/arm: Define and use new regime_tcr_value() function Peter Maydell
2022-07-18 13:59 ` [PULL 06/15] target/arm: Calculate mask/base_mask in get_level1_table_address() Peter Maydell
2022-07-18 13:59 ` [PULL 07/15] target/arm: Fold regime_tcr() and regime_tcr_value() together Peter Maydell
2022-07-18 13:59 ` [PULL 08/15] target/arm: Fix big-endian host handling of VTCR Peter Maydell
2022-07-18 13:59 ` [PULL 09/15] target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_t Peter Maydell
2022-07-18 13:59 ` [PULL 10/15] target/arm: Store TCR_EL* " Peter Maydell
2022-07-18 13:59 ` [PULL 11/15] target/arm: Honour VTCR_EL2 bits in Secure EL2 Peter Maydell
2022-07-18 13:59 ` [PULL 12/15] hw/adc: Fix CONV bit in NPCM7XX ADC CON register Peter Maydell
2022-07-18 13:59 ` [PULL 13/15] hw/adc: Make adci[*] R/W in NPCM7XX ADC Peter Maydell
2022-07-18 13:59 ` [PULL 14/15] target/arm: Don't set syndrome ISS for loads and stores with writeback Peter Maydell
2022-07-18 13:59 ` [PULL 15/15] Align Raspberry Pi DMA interrupts with Linux DTS Peter Maydell
2022-07-18 16:47 ` Peter Maydell [this message]
-- strict thread matches above, loose matches on Subject: below --
2020-01-17 14:28 [PULL 00/15] target-arm queue Peter Maydell
2020-01-17 18:03 ` Peter Maydell
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