All of lore.kernel.org
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH 3/4] target/arm: Take an exception if PC is misaligned
Date: Thu, 19 Aug 2021 20:46:19 +0100	[thread overview]
Message-ID: <CAFEAcA8eiSB2fjk7P_r=+_LzsVxtJP0H3NnNT-5oZ0FWqQq9mw@mail.gmail.com> (raw)
In-Reply-To: <CAFEAcA9NF0zR8eyzys-V6+VjhfM=7WGLYMYTHkSm-RSH7LHnGA@mail.gmail.com>

On Thu, 19 Aug 2021 at 20:18, Peter Maydell <peter.maydell@linaro.org> wrote:
> Just noticed that section G1.16.7 says that when we report
> PC alignment faults to AArch32 they should be prefetch aborts,
> not UDEF. The fault address and fault status registers also need
> to be set (with slightly varying behaviour for when the fault
> is taken to Hyp mode).
>
> For AArch64 we should also be setting the FAR, which means
> that for consistency it's better to use EXCP_PREFETCH_ABORT
> and set exception.vaddress in the translate-a64.c code
> (you get better logging in the exception-entry code)
> even though these different EXCP_* all boil down to the
> same synchronous-exception vector.

Also, looking at kernel code while reviewing your alignment-checking
patchset, I realized that we should also catch this case of
a prefetch abort in linux-user/ and turn it into a
SIGBUS/BUS_ADRALN with the address being whatever the value
in the FAR is (for both arm and aarch64).

-- PMM


  reply	other threads:[~2021-08-19 19:48 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-18  1:00 [PATCH 0/4] target/arm: Fix insn exception priorities Richard Henderson
2021-08-18  1:00 ` [PATCH 1/4] target/arm: Take an exception if PSTATE.IL is set Richard Henderson
2021-08-18  1:00 ` [PATCH 2/4] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn Richard Henderson
2021-08-19 13:36   ` Peter Maydell
2021-08-18  1:00 ` [PATCH 3/4] target/arm: Take an exception if PC is misaligned Richard Henderson
2021-08-18 16:44   ` Richard Henderson
2021-08-19 13:40   ` Peter Maydell
2021-08-19 16:50     ` Richard Henderson
2021-08-19 16:57       ` Richard Henderson
2021-08-19 19:24         ` Peter Maydell
2021-08-19 20:34           ` Richard Henderson
2021-08-19 19:18   ` Peter Maydell
2021-08-19 19:46     ` Peter Maydell [this message]
2021-08-18  1:00 ` [PATCH 4/4] target/arm: Suppress bp for exceptions with more priority Richard Henderson
2021-08-19 13:48   ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAFEAcA8eiSB2fjk7P_r=+_LzsVxtJP0H3NnNT-5oZ0FWqQq9mw@mail.gmail.com' \
    --to=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.