From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36055) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zk6PR-0005Eg-KJ for qemu-devel@nongnu.org; Thu, 08 Oct 2015 04:18:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zk6PO-0002Kp-D4 for qemu-devel@nongnu.org; Thu, 08 Oct 2015 04:18:41 -0400 Received: from mail-vk0-f47.google.com ([209.85.213.47]:36022) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zk6PO-0002Ki-8r for qemu-devel@nongnu.org; Thu, 08 Oct 2015 04:18:38 -0400 Received: by vkfp126 with SMTP id p126so27243332vkf.3 for ; Thu, 08 Oct 2015 01:18:37 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <1443911939-2825-1-git-send-email-edgar.iglesias@gmail.com> <1443911939-2825-2-git-send-email-edgar.iglesias@gmail.com> From: Peter Maydell Date: Thu, 8 Oct 2015 09:18:18 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v3 1/9] target-arm: Add HPFAR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Desnogues Cc: Edgar Iglesias , "qemu-devel@nongnu.org" , Alexander Graf , Sergey Fedorov , "Edgar E. Iglesias" , =?UTF-8?B?QWxleCBCZW5uw6ll?= On 8 October 2015 at 06:38, Laurent Desnogues wrote: > Hello, > > On Sun, Oct 4, 2015 at 12:38 AM, Edgar E. Iglesias > wrote: >> From: "Edgar E. Iglesias" >> >> Signed-off-by: Edgar E. Iglesias >> --- >> target-arm/cpu.h | 1 + >> target-arm/helper.c | 12 ++++++++++++ >> 2 files changed, 13 insertions(+) >> >> diff --git a/target-arm/cpu.h b/target-arm/cpu.h >> index cc1578c..895f2c2 100644 >> --- a/target-arm/cpu.h >> +++ b/target-arm/cpu.h >> @@ -278,6 +278,7 @@ typedef struct CPUARMState { >> }; >> uint64_t far_el[4]; >> }; >> + uint64_t hpfar_el2; >> union { /* Translation result. */ >> struct { >> uint64_t _unused_par_0; >> diff --git a/target-arm/helper.c b/target-arm/helper.c >> index 8367997..5a5e5f0 100644 >> --- a/target-arm/helper.c >> +++ b/target-arm/helper.c >> @@ -3223,6 +3223,10 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { >> { .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH, >> .opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 1, >> .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, >> + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH, >> + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, >> + .access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any, >> + .type = ARM_CP_CONST, .resetvalue = 0 }, >> REGINFO_SENTINEL >> }; >> >> @@ -3444,6 +3448,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { >> .resetvalue = 0, >> .writefn = gt_hyp_ctl_write, .raw_writefn = raw_write }, >> #endif >> + { .name = "HPFAR", .state = ARM_CP_STATE_AA32, >> + .cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, >> + .access = PL2_RW, .accessfn = access_el3_aa32ns, >> + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, >> + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_AA64, >> + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, >> + .access = PL2_RW, >> + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, >> REGINFO_SENTINEL >> }; > > Shouldn't these last two registers be placed before the "#endif" which > closes an "#ifndef CONFIG_USER_ONLY"? Mostly I've taken the approach that we only ifdef out regdefs which actually won't compile (the timer ones refer to functions which call softmmu-only timer related functions, for instance). Having regdefs for higher ELs in the USER_ONLY build is harmless; they just sit in the hash table and are never accessed. thanks -- PMM