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Date: Tue, 7 Feb 2012 17:28:50 +0000
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From: Peter Maydell <peter.maydell@linaro.org>
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Subject: Re: [Qemu-devel] [PATCH RFC v3 08/21] target-arm: Move CPU feature
	flags out of CPUState
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To: =?UTF-8?Q?Andreas_F=C3=A4rber?= <afaerber@suse.de>
Cc: qemu-devel@nongnu.org

On 3 February 2012 02:59, Andreas F=C3=A4rber <afaerber@suse.de> wrote:
> +static void sa11xx_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
> +{
> + =C2=A0 =C2=A0set_class_feature(k, ARM_FEATURE_STRONGARM);
> +}

> =C2=A0static const ARMCPUInfo arm_cpus[] =3D {
> =C2=A0 =C2=A0 {
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 .name =3D "arm926",
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 .id =3D 0x41069265,
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0.features =3D ARM_FEATURE(V5) |
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0AR=
M_FEATURE(VFP),
> =C2=A0 =C2=A0 },

> =C2=A0 =C2=A0 {
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 .name =3D "sa1100",
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 .id =3D 0x4401A11B,
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0.class_init =3D sa11xx_class_init,
> =C2=A0 =C2=A0 },

So why are we handling some of these feature bits by setting them
in .features, and some of them via a .class_init which sets the
feature bit?

-- PMM