All of lore.kernel.org
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: "~axelheider" <axelheider@gmx.de>
Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Subject: Re: [PATCH qemu.git v2 5/9] hw/timer/imx_epit: do not persist CR.SWR bit
Date: Fri, 18 Nov 2022 15:47:57 +0000	[thread overview]
Message-ID: <CAFEAcA8tVAqf8aF2Gf=0KJGXmytv7aw10o4+RyfQLB4qO7KVvg@mail.gmail.com> (raw)
In-Reply-To: <166783932395.3279.1096141058484230644-5@git.sr.ht>

On Mon, 7 Nov 2022 at 16:42, ~axelheider <axelheider@git.sr.ht> wrote:
>
> From: Axel Heider <axel.heider@hensoldt.net>
>
> Signed-off-by: Axel Heider <axel.heider@hensoldt.net>
> ---
>  hw/timer/imx_epit.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c
> index 5315d9633e..6af460946f 100644
> --- a/hw/timer/imx_epit.c
> +++ b/hw/timer/imx_epit.c
> @@ -191,8 +191,9 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
>      case 0: /* CR */
>
>          oldcr = s->cr;
> -        s->cr = value & 0x03ffffff;
> -        if (s->cr & CR_SWR) {
> +        /* SWR bit is never persisted, it clears itself once reset is done */
> +        s->cr = (value & ~CR_SWR) & 0x03ffffff;
> +        if (value & CR_SWR) {
>              /* handle the reset */
>              imx_epit_reset(DEVICE(s));
>              /*

There's a comment just below here that says "can we just 'break'
in this case?". That's there because last time we had to touch
this device we didn't have enough specific knowledge of the hardware
or test cases so we made a refactor that left the code with the same
probably-incorrect behaviour it had before the refactor. But, since
you're working on this device anyway: can we simply add the "break"
after imx_epit_reset() ?

If we can just say "if CR_SWR is set then the device resets like
a hardware reset", then this all simplifies out a lot and this
patch isn't necessary at all. (imx_epit_reset() clears the CR_SWR bit.)
I'm fairly sure we ought to be able to do that, and the missing 'break'
was just a bug...

> @@ -205,7 +206,7 @@ static void imx_epit_write(void *opaque, hwaddr offset, uint64_t value,
>          ptimer_transaction_begin(s->timer_reload);
>
>          /* Update the frequency. Has been done already in case of a reset. */
> -        if (!(s->cr & CR_SWR)) {
> +        if (!(value & CR_SWR)) {
>              imx_epit_set_freq(s);
>          }

thanks
-- PMM


  reply	other threads:[~2022-11-18 15:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-07 16:42 [PATCH qemu.git v2 0/9] hw/timer/imx_epit: imprive and fix compare timer handling ~axelheider
2022-10-25 10:33 ` [PATCH qemu.git v2 6/9] hw/timer/imx_epit: remove explicit fields cnt and freq ~axelheider
2022-11-18 15:54   ` Peter Maydell
2022-10-25 11:23 ` [PATCH qemu.git v2 3/9] hw/timer/imx_epit: simplify interrupt logic ~axelheider
2022-11-18 15:40   ` Peter Maydell
2022-11-21 17:35     ` Axel Heider
2022-10-25 15:33 ` [PATCH qemu.git v2 1/9] hw/timer/imx_epit: improve comments ~axelheider
2022-11-18 15:35   ` Peter Maydell
2022-10-25 18:32 ` [PATCH qemu.git v2 4/9] hw/timer/imx_epit: software reset clears the interrupt ~axelheider
2022-11-18 15:42   ` Peter Maydell
2022-10-27 13:09 ` [PATCH qemu.git v2 7/9] hw/timer/imx_epit: factor out register write handlers ~axelheider
2022-11-18 16:05   ` Peter Maydell
2022-10-30 23:59 ` [PATCH qemu.git v2 2/9] hw/timer/imx_epit: cleanup CR defines ~axelheider
2022-11-18 15:35   ` Peter Maydell
2022-11-02 15:36 ` [PATCH qemu.git v2 5/9] hw/timer/imx_epit: do not persist CR.SWR bit ~axelheider
2022-11-18 15:47   ` Peter Maydell [this message]
2022-11-19 17:41     ` Axel Heider
2022-11-03 11:09 ` [PATCH qemu.git v2 9/9] hw/timer/imx_epit: fix compare timer handling ~axelheider
2022-11-18 19:00   ` Peter Maydell
2022-11-29 22:27     ` Axel Heider
2022-11-04 15:01 ` [PATCH qemu.git v2 8/9] hw/timer/imx_epit: change reset handling ~axelheider
2022-11-18 15:58   ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAFEAcA8tVAqf8aF2Gf=0KJGXmytv7aw10o4+RyfQLB4qO7KVvg@mail.gmail.com' \
    --to=peter.maydell@linaro.org \
    --cc=axelheider@gmx.de \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.