From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44071) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WSVm8-0005Ss-DI for qemu-devel@nongnu.org; Tue, 25 Mar 2014 14:08:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WSVkL-0005G7-7i for qemu-devel@nongnu.org; Tue, 25 Mar 2014 14:06:51 -0400 Received: from mail-lb0-f176.google.com ([209.85.217.176]:46603) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WSVkK-0005Dp-V9 for qemu-devel@nongnu.org; Tue, 25 Mar 2014 14:06:45 -0400 Received: by mail-lb0-f176.google.com with SMTP id 10so653007lbg.7 for ; Tue, 25 Mar 2014 11:06:43 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <532F57A9.8070909@gmail.com> References: <1395597768-3159-1-git-send-email-tommusta@gmail.com> <532F57A9.8070909@gmail.com> From: Peter Maydell Date: Tue, 25 Mar 2014 18:06:23 +0000 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [V2 PATCH] target-ppc: Bug: VSX Convert to Integer Should Truncate List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Tom Musta Cc: "qemu-ppc@nongnu.org" , QEMU Developers On 23 March 2014 21:52, Tom Musta wrote: > The various VSX Convert to Integer instructions should truncate the > mantissa. This fix forces the softfloat rounding mode to "round to > zero" prior to performing the conversion. After the conversion is > completed, the internal rounding mode is restored from the PowerPC > FPSCR bits. > > Signed-off-by: Tom Musta > --- > V2: Restored rounding mode prior to checking exceptions per Peter Maydell's > review. > > This bug was discovered when running wget, which does this: > > double maxtime; > struct timeval tmout; > ... > tmout.tv_usec = 1000000 * (maxtime - (long) maxtime); > > The newest PowerPC 64-bit gcc's are now using xscvdpsxds to perform the cast of > the double to long. A timeout of 0.95 was erroneously rounding up to 1 and > hence computing a negative timeout value. > > It would be great if we could still get this into 2.0. > > target-ppc/fpu_helper.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c > index fd91239..9b3a6f7 100644 > --- a/target-ppc/fpu_helper.c > +++ b/target-ppc/fpu_helper.c > @@ -2568,7 +2568,11 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ > fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0); \ > xt.tfld = rnan; \ > } else { \ > + /* force round to zero mode (truncation) */ \ > + set_float_rounding_mode(float_round_to_zero, &env->fp_status); \ > xt.tfld = stp##_to_##ttp(xb.sfld, &env->fp_status); \ > + /* restore rounding mode from FPSCR */ \ > + fpscr_set_rounding_mode(env); \ > if (env->fp_status.float_exception_flags & float_flag_invalid) { \ > fload_invalid_op_excp(env, POWERPC_EXCP_FP_VXCVI, 0); \ > } \ > -- > 1.7.1 Looking at this a little more closely, why aren't we just using the _round_to_zero versions of the float to int conversion softfloat functions? (This is how we implement fctiwz vs fctiw, for instance.) thanks -- PMM