From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42023) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZStG-0006xP-Ha for qemu-devel@nongnu.org; Thu, 24 Oct 2013 17:56:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VZSt6-0002EC-Vk for qemu-devel@nongnu.org; Thu, 24 Oct 2013 17:56:26 -0400 Received: from mail-lb0-f172.google.com ([209.85.217.172]:47952) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZSt6-0002DY-P8 for qemu-devel@nongnu.org; Thu, 24 Oct 2013 17:56:16 -0400 Received: by mail-lb0-f172.google.com with SMTP id c11so105600lbj.31 for ; Thu, 24 Oct 2013 14:56:15 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20131024211249.723543071@amt.cnet> References: <20131024211158.064049176@amt.cnet> <20131024211249.723543071@amt.cnet> From: Peter Maydell Date: Thu, 24 Oct 2013 22:55:54 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [patch 2/2] i386: pc: align gpa<->hpa on 1GB boundary List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcelo Tosatti Cc: Andrea Arcangeli , Paolo Bonzini , QEMU Developers , Gleb Natapov On 24 October 2013 22:12, Marcelo Tosatti wrote: > Align guest physical address and host physical address > beyond guest 4GB on a 1GB boundary, in case hugetlbfs is used. > > Otherwise 1GB TLBs cannot be cached for the range. > + if (hpagesize == (1<<30)) { > + unsigned long holesize = 0x100000000ULL - below_4g_mem_size; > + > + memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram, > + 0x100000000ULL, > + above_4g_mem_size - holesize); > + memory_region_add_subregion(system_memory, 0x100000000ULL, > + ram_above_4g); > + > + ram_above_4g_piecetwo = g_malloc(sizeof(*ram_above_4g_piecetwo)); > + memory_region_init_alias(ram_above_4g_piecetwo, NULL, > + "ram-above-4g-piecetwo", ram, > + 0x100000000ULL - holesize, holesize); > + memory_region_add_subregion(system_memory, > + 0x100000000ULL + > + above_4g_mem_size - holesize, > + ram_above_4g_piecetwo); > + } else { > + memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram, > + below_4g_mem_size, above_4g_mem_size); > + memory_region_add_subregion(system_memory, 0x100000000ULL, > ram_above_4g); This looks pretty weird. Presence or absence of host OS features shouldn't affect how we model the guest hardware and RAM. Conversely, if hugetlbs have performance related requirements then a patch which only touches the x86 pc model seems rather limited. -- PMM