From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48271) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1an7PY-0004fO-TP for qemu-devel@nongnu.org; Mon, 04 Apr 2016 12:31:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1an7PX-00086b-VM for qemu-devel@nongnu.org; Mon, 04 Apr 2016 12:31:32 -0400 Received: from mail-vk0-x22f.google.com ([2607:f8b0:400c:c05::22f]:33103) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1an7PX-00086B-O5 for qemu-devel@nongnu.org; Mon, 04 Apr 2016 12:31:31 -0400 Received: by mail-vk0-x22f.google.com with SMTP id k1so187015986vkb.0 for ; Mon, 04 Apr 2016 09:31:31 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <57029630.3070300@twiddle.net> References: <57029630.3070300@twiddle.net> From: Peter Maydell Date: Mon, 4 Apr 2016 17:31:11 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] best way to implement emulation of AArch64 tagged addresses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: Thomas Hanson , QEMU Developers On 4 April 2016 at 17:28, Richard Henderson wrote: > On 04/04/2016 08:51 AM, Peter Maydell wrote: >> In particular I think if you just do the relevant handling of the tag >> bits in target-arm's get_phys_addr() and its subroutines then this >> should work ok, with the exceptions that: >> * the QEMU TLB code will think that [tag A + address X] and >> [tag B + address X] are different virtual addresses and they will >> miss each other in the TLB > > > Yep. Not only miss, but actively contend with each other. Yes. Can we avoid that, or do we just have to live with it? I guess if the TCG fast path is doing a compare on full insn+tag then we pretty much have to live with it. >> * tlb invalidate by address becomes nasty because we need to invalidate >> [every tag + address X] > > Hmm. We should require only one flush for X. But the common code doesn't > know that... I suppose a new tlb_flush_page_mask would do the trick. Yes, I think we would need that. >> Can we fix those just by having arm_tlb_fill() call >> tlb_set_page_with_attrs() with the vaddr with the tag masked out? > > No, that misses when we perform the full vaddr+tag comparison on the TCG > fast path. Rats, you're right. thanks -- PMM