From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44142) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ef8NJ-0000MV-Nr for qemu-devel@nongnu.org; Fri, 26 Jan 2018 13:05:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ef8NI-0006id-FH for qemu-devel@nongnu.org; Fri, 26 Jan 2018 13:05:17 -0500 Received: from mail-oi0-x236.google.com ([2607:f8b0:4003:c06::236]:42283) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ef8NH-0006iD-UI for qemu-devel@nongnu.org; Fri, 26 Jan 2018 13:05:16 -0500 Received: by mail-oi0-x236.google.com with SMTP id c8so864041oiy.9 for ; Fri, 26 Jan 2018 10:05:15 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20180126175418.GH25150@localhost.localdomain> References: <1512670493-18114-1-git-send-email-peter.maydell@linaro.org> <20171209010811.GJ3037@localhost.localdomain> <20180122183301.GA31237@localhost.localdomain> <20180126104247.GF25150@localhost.localdomain> <20180126175418.GH25150@localhost.localdomain> From: Peter Maydell Date: Fri, 26 Jan 2018 18:04:54 +0000 Message-ID: Content-Type: text/plain; charset="UTF-8" Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH 0/6] arm: support -cpu max (and gic-version=max) List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: qemu-arm , QEMU Developers , "Richard W . M . Jones" , "patches@linaro.org" On 26 January 2018 at 17:54, Eduardo Habkost wrote: > On Fri, Jan 26, 2018 at 11:02:24AM +0000, Peter Maydell wrote: >> None of those are things we'd want to expose to the user, really >> (except maybe 'cfgend'): they're all intended for the QEMU board >> or SoC code that needs to configure and wire the CPU up. Ideally >> there'd be a mechanism for screening them out of the -cpu option >> list. >> > > Yeah, it's becoming clearer to me that we need to address this > better than with a simple "x-" prefix convention. > > If we remove the link and child properties, we have: > > midr (uint32) > mp-affinity (uint64) > psci-conduit (uint32) > reset-hivecs (bool) > node-id (int32) > start-powered-off (bool) > cfgend (bool) > > I wonder how many of them aren't useful with -cpu but might be > useful with -device in the future. It would require a lot of work to be able to create an Arm CPU with -device -- there's no way at the moment to wire it up to the interrupt controller... thanks -- PMM