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Tue, 27 Apr 2021 08:02:09 -0700 (PDT) MIME-Version: 1.0 References: <20210427095458.3hbckyqbmfztcmge@gator.home> <20210427144819.fiecdpdgre7tznvq@gator.home> In-Reply-To: From: Peter Maydell Date: Tue, 27 Apr 2021 16:01:10 +0100 Message-ID: Subject: Re: [PATCH RESEND v2 0/6] target/arm: Add nested virtualization support To: Andrew Jones Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=peter.maydell@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , QEMU Developers , Andrea Bolognani , qemu-arm , Haibo Xu , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, 27 Apr 2021 at 15:58, Peter Maydell wrote: > > On Tue, 27 Apr 2021 at 15:48, Andrew Jones wrote: > > > Since these types of features seem to blur the line between being a CPU > > and board property, then I think I'd prefer we call them CPU properties, > > as they come from the CPU manual. > > Conversely, I prefer to call them board properties, because that's > the way it works in hardware: the hardware board has the necessary > support for the system-level feature, and part of that is that it > has an SoC or CPU which has been configured to have the properties > that are needed for the board to support the feature. Having a CPU > that nominally supports a feature is useless if the system as a whole > doesn't handle it. ...this also means that we're consistent between boards: some board models unconditionally have support for a feature (and always set it on the CPU, GIC, etc), some don't ever support the feature (and always disable it), and a few offer the user the choice. Having the user use CPU properties suggests that they can, for instance, plug a has-el3 CPU into any board model, which in general won't work. -- PMM