Re: [Qemu-devel] [PATCH v4 14/21] target-arm: Implement AArch64 views of fault status and data registers

[Peter Maydell <peter.maydell@linaro.org>]

On 17 March 2014 05:30, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote:
> On Fri, Mar 7, 2014 at 5:32 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
>> @@ -2979,20 +2988,23 @@ void arm_cpu_do_interrupt(CPUState *cs)
>>          env->exception.fsr = 2;
>>          /* Fall through to prefetch abort.  */
>>      case EXCP_PREFETCH_ABORT:
>> -        env->cp15.c5_insn = env->exception.fsr;
>> -        env->cp15.c6_insn = env->exception.vaddress;
>> +        env->cp15.ifsr_el2 = env->exception.fsr;
>> +        env->cp15.far_el1 = deposit64(env->cp15.far_el1, 32, 32,
>> +                                      env->exception.vaddress);
>
> Is it better to just grab the CPRegInfo and pass it to raw_write() to
> do the deposit dirty work?

You'd have to do a hash-table lookup and it would be an odd
case compared to the other registers we update here, so I think
just directly depositing to the state field is simpler.

thanks
-- PMM