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From: Peter Maydell <peter.maydell@linaro.org>
To: Tobias Roehmel <quic_trohmel@quicinc.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 07/11] target/arm: Enable TTBCR_EAE for ARM_FEATURE_V8_R
Date: Thu, 14 Jul 2022 16:34:33 +0100	[thread overview]
Message-ID: <CAFEAcA9H5tdkkmS3C7Zb9ufQ=6QP_UZkjn-4nM+A3fzF_Yq0pQ@mail.gmail.com> (raw)
In-Reply-To: <20220714145355.7225-8-quic_trohmel@quicinc.com>

On Thu, 14 Jul 2022 at 15:54, Tobias Roehmel <quic_trohmel@quicinc.com> wrote:
>
> From: Tobias Röhmel <quic_trohmel@quicinc.com>
>
> Enable TTBCR_EAE during reset since it's always set to 1 for Cortex-R52.
> See ARM Architecture Reference Manual Supplement - ARMv8, for the ARMv8-R
> AArch32 architecture profile Version:A.c section C1.2.
>
> Signed-off-by: Tobias Röhmel <quic_trohmel@quicinc.com>
> ---
>  target/arm/cpu.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 2c26a5387d..121fc2a819 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -261,6 +261,9 @@ static void arm_cpu_reset(DeviceState *dev)
>          if (arm_feature(env, ARM_FEATURE_V8_R)) {
>              env->cp15.rvbar = cpu->rvbar_prop;
>              env->regs[15] = cpu->rvbar_prop;
> +            env->cp15.tcr_el[0].raw_tcr = TTBCR_EAE;
> +            env->cp15.tcr_el[1].raw_tcr = TTBCR_EAE;
> +            env->cp15.tcr_el[2].raw_tcr = TTBCR_EAE;
>          }
>      }

R-profile doesn't have a TTBCR, so I'm not sure this is the right way
to handle this behaviour requirement... Probably extended_addresses_enabled()
and similar places should just return true for v8 PMSA.

-- PMM


  reply	other threads:[~2022-07-14 15:40 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-14 14:53 [PATCH 00/11] Add Cortex-R52 Tobias Roehmel
2022-07-14 14:53 ` [PATCH 01/11] target/arm: Add ARM_FEATURE_V8_R Tobias Roehmel
2022-07-14 15:16   ` Peter Maydell
2022-07-14 14:53 ` [PATCH 02/11] target/arm: Add ARM Cortex-R52 cpu Tobias Roehmel
2022-07-14 15:23   ` Peter Maydell
2022-07-14 14:53 ` [PATCH 03/11] target/arm: Add v8R MIDR register Tobias Roehmel
2022-07-14 15:15   ` Peter Maydell
2022-07-14 14:53 ` [PATCH 04/11] target/arm: Make RVBAR available for non AARCH64 CPUs Tobias Roehmel
2022-07-14 15:28   ` Peter Maydell
2022-07-14 14:53 ` [PATCH 05/11] target/arm: Make stage_2_format for cache attributes optional Tobias Roehmel
2022-07-14 14:53 ` [PATCH 06/11] target/arm: Add ARMCacheAttrs to the signature of pmsav8_mpu_lookup Tobias Roehmel
2022-07-14 14:53 ` [PATCH 07/11] target/arm: Enable TTBCR_EAE for ARM_FEATURE_V8_R Tobias Roehmel
2022-07-14 15:34   ` Peter Maydell [this message]
2022-07-14 14:53 ` [PATCH 08/11] target/arm Add PMSAv8r registers Tobias Roehmel
2022-07-14 14:53 ` [PATCH 09/11] target/arm: Add PMSAv8r functionality Tobias Roehmel
2022-07-14 14:53 ` [PATCH 10/11] target/arm: Make SPSR_hyp accessible for Cortex-R52 Tobias Roehmel
2022-07-14 15:46   ` Peter Maydell
2022-07-14 16:52     ` Peter Maydell
2022-07-14 14:53 ` [PATCH 11/11] hw/arm: Add R52 machine Tobias Roehmel
2022-07-14 15:53   ` Peter Maydell

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