From: Peter Maydell <peter.maydell@linaro.org>
To: Wei Huang <wei.huang2@amd.com>
Cc: Eduardo Habkost <eduardo@habkost.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
Jason Wang <jasowang@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
QEMU Developers <qemu-devel@nongnu.org>,
Peter Xu <peterx@redhat.com>,
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: who's maintaining amd_iommu.c these days?
Date: Fri, 1 Apr 2022 17:14:35 +0100 [thread overview]
Message-ID: <CAFEAcA9KogtFm0g1+T40Kfz4GDRMtfhDeJ0jTb5dfax5E4voMQ@mail.gmail.com> (raw)
In-Reply-To: <633f66f9-2a86-6d52-15de-d0c557412bf7@amd.com>
On Fri, 1 Apr 2022 at 17:11, Wei Huang <wei.huang2@amd.com> wrote:
>
>
>
> On 3/31/22 21:09, Jason Wang wrote:
> > On Fri, Apr 1, 2022 at 2:30 AM Peter Xu <peterx@redhat.com> wrote:
> >>
> >> On Thu, Mar 31, 2022 at 05:01:52PM +0100, Peter Maydell wrote:
> >>> (4) The claimed bit layout of the event structure doesn't
> >>> match up with the one in the spec document I found. This
> >>> could be because I found a document for some other bit
> >>> of hardware, of course.
> Could you elaborate? Are you referring to amdvi_setevent_bits(evt, info,
> 55, 8)?
https://www.amd.com/system/files/TechDocs/48882_IOMMU.pdf
was the spec I found through random googling, but the event
structure layouts in chapter 2.5 of that document aren't
at all like the one that amdvi_encode_event() is using.
Maybe that's the wrong spec, as I say.
thanks
-- PMM
next prev parent reply other threads:[~2022-04-01 16:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-31 16:01 who's maintaining amd_iommu.c these days? Peter Maydell
2022-03-31 18:30 ` Peter Xu
2022-04-01 2:09 ` Jason Wang
2022-04-01 16:11 ` Wei Huang
2022-04-01 16:14 ` Peter Maydell [this message]
2022-04-01 16:35 ` Wei Huang
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