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From: Peter Maydell <peter.maydell@linaro.org>
To: Hao Wu <wuhaotsh@google.com>
Cc: IV00 Uri Trichter <Uri.Trichter@nuvoton.com>,
	Titus Rwantare <titusr@google.com>,
	Patrick Venture <venture@google.com>,
	Havard Skinnemoen <hskinnemoen@google.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	CS20 KFTing <kfting@nuvoton.com>, qemu-arm <qemu-arm@nongnu.org>,
	IS20 Avi Fishman <Avi.Fishman@nuvoton.com>,
	Vishal.Soni@microsoft.com
Subject: Re: [PATCH for-7.1 00/11] hw/arm: Add NPCM8XX support
Date: Thu, 21 Apr 2022 17:42:13 +0100	[thread overview]
Message-ID: <CAFEAcA9P9aYrOgo08h1qS4mWt3+GmxgDYbxC-BTrG8_e67w18w@mail.gmail.com> (raw)
In-Reply-To: <CAGcCb12ouKaqwT5JAdysiVVmOQfz_MAYH+uukPfrz_3FqC7QdQ@mail.gmail.com>

On Thu, 21 Apr 2022 at 17:29, Hao Wu <wuhaotsh@google.com> wrote:
>
> Thanks for all the comments you gave! I'll go over and address them recently.
>
> For this question, The actual CPU should be cortex A35. However, I don't see
> them supported in QEMU. If I inserted CPU with "cortex-a35" QEMU will complain:
> qemu-system-aarch64: missing object type 'cortex-a35-arm-cpu'
>
> What should I do here?

You need to implement the new CPU type first... This means adding
something to target/arm/cpu64.c which will look similar to the
existing CPU handling. You need to watch out for:
 * getting all the ID register values right (check the TRM for the CPU)
 * implementing whatever the right impdef system registers are
 * checking whether QEMU is still missing support for any of the
   architectural features that the A35 implements (what QEMU
   supports is listed in docs/system/arm/emulation.rst)

It's typically not much code but quite a lot of cross-checking
against the TRM for the CPU that we're not missing pieces...
Since you can add the A35 as a supported CPU type for the 'virt'
board you can do A35 support as a separate patchset that doesn't
depend on the npmc8xx work.

https://patchew.org/QEMU/20220417174426.711829-1-richard.henderson@linaro.org/20220417174426.711829-60-richard.henderson@linaro.org/
is an example of how to add a new CPU (in that case the A76), at
the end of a large patchset from RTH that's still going through
code review.

-- PMM


  reply	other threads:[~2022-04-21 17:55 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-05 22:36 [PATCH for-7.1 00/11] hw/arm: Add NPCM8XX support Hao Wu
2022-04-05 22:36 ` [PATCH for-7.1 01/11] docs/system/arm: Add Description for NPCM8XX SoC Hao Wu
2022-04-05 22:36 ` [PATCH for-7.1 02/11] hw/ssi: Make flash size a property in NPCM7XX FIU Hao Wu
2022-04-21 10:48   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 03/11] hw/misc: Support NPCM8XX GCR module Hao Wu
2022-04-21 10:51   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 04/11] hw/misc: Support NPCM8XX CLK Module Registers Hao Wu
2022-04-21 10:54   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 05/11] hw/misc: Store DRAM size in NPCM8XX GCR Module Hao Wu
2022-04-21 10:57   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 06/11] hw/intc: Add a property to allow GIC to reset into non secure mode Hao Wu
2022-04-21 11:00   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 07/11] hw/misc: Support 8-bytes memop in NPCM GCR module Hao Wu
2022-04-21 11:04   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 08/11] hw/net: Add NPCM8XX PCS Module Hao Wu
2022-04-21 11:13   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 09/11] pc-bios: Add NPCM8xx Bootrom Hao Wu
2022-04-21 11:22   ` Peter Maydell
2022-04-05 22:36 ` [PATCH for-7.1 10/11] hw/arm: Add NPCM8XX SoC Hao Wu
2022-04-05 22:36 ` [PATCH for-7.1 11/11] hw/arm: Add NPCM845 Evaluation board Hao Wu
2022-04-21 11:28   ` Peter Maydell
2022-04-21 10:44 ` [PATCH for-7.1 00/11] hw/arm: Add NPCM8XX support Peter Maydell
2022-04-21 16:28   ` Hao Wu
2022-04-21 16:42     ` Peter Maydell [this message]
2022-04-21 16:59       ` Hao Wu

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