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From: Peter Maydell <peter.maydell@linaro.org>
Date: Sat, 7 May 2016 22:50:48 +0100
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Subject: Re: [Qemu-devel] [PATCH 51/52] target-m68k: add cmpm
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To: Laurent Vivier <laurent@vivier.eu>
Cc: Richard Henderson <rth@twiddle.net>, QEMU Developers <qemu-devel@nongnu.org>, Andreas Schwab <schwab@linux-m68k.org>, Alexander Graf <agraf@suse.de>, Greg Ungerer <gerg@uclinux.org>

On 7 May 2016 at 20:01, Laurent Vivier <laurent@vivier.eu> wrote:
>
>
> Le 07/05/2016 =C3=A0 00:00, Richard Henderson a =C3=A9crit :
>> On 05/04/2016 11:21 AM, Laurent Vivier wrote:
>>> +    reg =3D AREG(insn, 0);
>>> +    src =3D gen_load(s, opsize, reg, 1);
>>> +    tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
>>> +
>>> +    reg =3D AREG(insn, 9);
>>> +    dest =3D gen_load(s, opsize, reg, 1);
>>> +    tcg_gen_addi_i32(reg, reg, opsize_bytes(opsize));
>>
>> Delay the writeback to the first areg until after the second load.
>
> We can't delay because we can have "cmpm (%a0)+,(%a0)+" that is used to
> compare two consecutive memory contents.

If you write back to the first areg before the second
load, don't you get the wrong value as seen by the
exception handler if the second load faults?

Usually you want to use the updated value for the
purposes of calculating the address to use in the
second load, but you don't want to actually update
the guest CPU register until after the load has
happened, in case it faults.

(Disclaimer: I'm just assuming that on a fault no
registers are updated, but if that wasn't the case the OS
wouldn't be able to cleanly restart the instruction after
fixing up a page fault, so it seems like a good guess.)

thanks
-- PMM