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From: Peter Maydell <peter.maydell@linaro.org>
Date: Fri, 6 Jan 2017 12:07:21 +0000
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Subject: Re: [Qemu-devel] [PATCH v3 0/3] Add the generic ARM timer
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To: Alistair Francis <alistair.francis@xilinx.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>, qemu-arm <qemu-arm@nongnu.org>, =?UTF-8?B?S09OUkFEIEZyw6lkw6lyaWM=?= <fred.konrad@greensocs.com>, Alistair Francis <alistair23@gmail.com>

On 20 December 2016 at 22:41, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> These three patches and and connect the Generic ARM Timer. This includes
> support for dropping insecure writes and includes the ReadBase memory
> map.

Now reviewed. The really sticky bit I suspect is going to be
how we model the required connections between this and the
CPUs so that adjustments to the counter here update the
views the CPUs have of the counter value.

The other mandatory part of the system-level generic timer is
the CNTCTLBase frame (timer control), but I guess we can
leave that for later.

thanks
-- PMM