From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50530) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anASN-0001OB-3n for qemu-devel@nongnu.org; Mon, 04 Apr 2016 15:46:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1anASM-000064-66 for qemu-devel@nongnu.org; Mon, 04 Apr 2016 15:46:39 -0400 Received: from mail-vk0-x22a.google.com ([2607:f8b0:400c:c05::22a]:34471) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1anASL-00005c-UJ for qemu-devel@nongnu.org; Mon, 04 Apr 2016 15:46:38 -0400 Received: by mail-vk0-x22a.google.com with SMTP id e185so194009864vkb.1 for ; Mon, 04 Apr 2016 12:46:37 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20160404194236.GE22665@thinpad.lan.raisama.net> References: <1458910214-12239-1-git-send-email-aleksandar.markovic@rt-rk.com> <1458910214-12239-2-git-send-email-aleksandar.markovic@rt-rk.com> <56F9A3D1.2050402@twiddle.net> <20160404193723.GD22665@thinpad.lan.raisama.net> <20160404194236.GE22665@thinpad.lan.raisama.net> From: Peter Maydell Date: Mon, 4 Apr 2016 20:46:17 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH 1/2] softfloat: Enable run-time-configurable meaning of signaling NaN bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: "proljc@gmail.com" , "kbastian@mail.uni-paderborn.de" , "mark.cave-ayland@ilande.co.uk" , "qemu-devel@nongnu.org" , "agraf@suse.de" , "blauwirbel@gmail.com" , "jcmvbkbc@gmail.com" , Aleksandar Markovic , "qemu-arm@nongnu.org" , "qemu-ppc@nongnu.org" , Petar Jovanovic , "pbonzini@redhat.com" , Miodrag Dinic , "edgar.iglesias@gmail.com" , "gxt@mprc.pku.edu.cn" , Leon Alrae , "afaerber@suse.de" , "aurelien@aurel32.net" , Richard Henderson On 4 April 2016 at 20:42, Eduardo Habkost wrote: > On Mon, Apr 04, 2016 at 08:38:54PM +0100, Peter Maydell wrote: >> On 4 April 2016 at 20:37, Eduardo Habkost wrote: >> > On Mon, Apr 04, 2016 at 02:31:47PM +0100, Peter Maydell wrote: >> >> On 4 April 2016 at 14:21, Aleksandar Markovic >> >> wrote: >> >> > B. arm - explicitely sets other fields of float_status, >> >> > explicit invocation of set_snan_bit_is_one(0) added >> >> >> >> We zero the float_status structs on reset, because they are earlier >> >> in the CPUARMState structure than the 'features' field (and so the >> >> memset() in arm_cpu_reset() will clear them). So you don't >> >> need to explicitly zero a field like this. I expect the other >> >> architectures are the same. >> > >> > Even if it is not zeroed on reset, it is zeroed on object_new(). >> > Isn't that enough? >> >> It must be zeroed on reset, otherwise we won't get the right >> behaviour if you reset the CPU after running it for a bit. >> object_new() zeroing is not sufficient. > > The only calls to set_snan_bit_is_one() with non-zero arguments I > see on this patch are during CPU init or reset. How exactly would > the snan_bit_is_one field change to non-zero during runtime, to > require zeroing it again on reset? I meant in general for these float_status flags, not anything specific to this particular flag. thanks -- PMM