From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49257) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WYGVS-0001cu-7G for qemu-devel@nongnu.org; Thu, 10 Apr 2014 11:03:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WYGVN-0003On-Kw for qemu-devel@nongnu.org; Thu, 10 Apr 2014 11:03:10 -0400 Received: from mail-lb0-f181.google.com ([209.85.217.181]:41932) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WYGVN-0003Oa-Ec for qemu-devel@nongnu.org; Thu, 10 Apr 2014 11:03:05 -0400 Received: by mail-lb0-f181.google.com with SMTP id c11so2435778lbj.12 for ; Thu, 10 Apr 2014 08:03:04 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <1394134385-1727-1-git-send-email-peter.maydell@linaro.org> <1394134385-1727-22-git-send-email-peter.maydell@linaro.org> From: Peter Maydell Date: Thu, 10 Apr 2014 16:02:44 +0100 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v4 21/21] hw/arm/virt: Add support for Cortex-A57 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Rob Herring , Patch Tracking , Michael Matz , Claudio Fontana , Alexander Graf , "qemu-devel@nongnu.org Developers" , Laurent Desnogues , Dirk Mueller , Will Newton , =?UTF-8?B?QWxleCBCZW5uw6ll?= , "kvmarm@lists.cs.columbia.edu" , Christoffer Dall , Richard Henderson On 17 March 2014 07:12, Peter Crosthwaite wrote: > On Fri, Mar 7, 2014 at 5:33 AM, Peter Maydell wrote: >> Support the Cortex-A57 in the virt machine model. >> >> Signed-off-by: Peter Maydell >> --- >> This should perhaps not be just stealing the a15mpcore_priv >> on the basis that it's a GICv2... > > Wont this mean you gets lots of extraneous hardware? Although, with a > pure virtual machine I guess you can do whatever you really want. No, a15mpcore_priv only has a GIC in it. >> --- >> hw/arm/virt.c | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/hw/arm/virt.c b/hw/arm/virt.c >> index 517f2fe..d985d2e 100644 >> --- a/hw/arm/virt.c >> +++ b/hw/arm/virt.c >> @@ -123,6 +123,14 @@ static VirtBoardInfo machines[] = { >> .irqmap = a15irqmap, >> }, >> { >> + .cpu_model = "cortex-a57", >> + /* Use the A15 private peripheral model for now: probably wrong! */ >> + .qdevname = "a15mpcore_priv", > > Can you just change this to gics qdev name? The qdev propnames of gic > and mpcore ("num-cpu" and "num-irq") should just match. Then perhaps a > little callback to set gicv2 version property. That would miss the other thing a15mpcore_priv does for us, which is to wire up the generic timer outputs from the CPU objects to the appropriate GIC inputs. (Also the gpio_in lines on a15mpcore_priv and the gic itself are not the same: a15mpcore_priv only exposise the SPIs.) We could in theory write an a57mpcore_priv which was a carbon copy of a15mpcore_priv, but that seems a bit pointless. I think it's probably actually reasonable to use a15mpcore_priv here, with an appropriate comment: /* Our A57 has an A15-style GICv2, so we can use a15mpcore_priv */ thanks -- PMM