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From: Peter Maydell <peter.maydell@linaro.org>
To: Anthony Liguori <anthony@codemonkey.ws>
Cc: Avi Kivity <avi@redhat.com>,
	Mark Langsdorf <mark.langsdorf@calxeda.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 3/9] arm: add missing v7 cp15 registers
Date: Thu, 22 Dec 2011 15:26:14 +0000	[thread overview]
Message-ID: <CAFEAcA_7meuQY03sSNE4z5SObsH5U6UA7G5s6UE1OFkSN+GmgA@mail.gmail.com> (raw)
In-Reply-To: <4EF33DF2.3090607@codemonkey.ws>

On 22 December 2011 14:25, Anthony Liguori <anthony@codemonkey.ws> wrote:
> First, we need to actually model the CPUs.  The general trouble with that
> today is that everything needs to live on a bus after we get QOM merged,
> that requirement will be relaxed.
>
> Once the CPUs are objects, they can create children devices (builtin
> interrupt controller for instance) in their instance_init function.  It
> would be a child<> property in this case.

So, in summary to Mark, if "always reads as zero" is sufficient
for your purposes, I'll accept this as a patch which implements
that (if you fix the other issues and add a comment that it
ought to be the base address of the private peripheral region).
We can implement it properly when we have enough object model
infrastructure to do so.

-- PMM

      reply	other threads:[~2011-12-22 15:26 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-20 19:10 [Qemu-devel] [PATCH 3/9] arm: add missing v7 cp15 registers Mark Langsdorf
2011-12-20 19:48 ` Peter Maydell
2011-12-21 16:37   ` Mark Langsdorf
2011-12-21 21:10     ` Peter Maydell
2011-12-22 10:14       ` Avi Kivity
2011-12-22 12:37         ` Peter Maydell
2011-12-22 12:43           ` Avi Kivity
2011-12-22 14:25             ` Anthony Liguori
2011-12-22 15:26               ` Peter Maydell [this message]

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