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Thu, 04 Feb 2021 06:25:02 -0800 (PST) MIME-Version: 1.0 References: <20210201100903.17309-1-cfontana@suse.de> <20210201100903.17309-22-cfontana@suse.de> <871rdxrt08.fsf@linaro.org> <7500a412-c94a-6990-eb48-9ee78bfb94e3@suse.de> <05980f44-88a6-6ef7-b263-07c2d898b8f0@redhat.com> <483bc092-cf71-d2c2-59d7-861f3131c8e4@suse.de> In-Reply-To: <483bc092-cf71-d2c2-59d7-861f3131c8e4@suse.de> From: Peter Maydell Date: Thu, 4 Feb 2021 14:24:51 +0000 Message-ID: Subject: Re: [PATCH v15 21/23] hw/core/cpu: call qemu_init_vcpu in cpu_common_realizefn To: Claudio Fontana Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=peter.maydell@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Thomas Huth , Eduardo Habkost , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= , Richard Henderson , QEMU Developers , Roman Bolshakov , Alistair Francis , Paolo Bonzini , =?UTF-8?B?QWxleCBCZW5uw6ll?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, 4 Feb 2021 at 14:18, Claudio Fontana wrote: > If we could consistently move not only qemu_vcpu_init, but also reset in the common code in cpu_common_realizefn, > and force the sequence: qemu_vcpu_init(); cpu_reset(); in there, > > and this actually works for all targets, maybe this could actually be an improvement. So my question here would be: what is special about CPUs that we have to reset them in their realize function? For other devices, we don't reset them in the init/realize sequence; we rely on the whole system getting reset and that doing reset of devices. There almost certainly *is* a reason here (my guess would be that it's related to the mess that is reset and in particular that CPU objects don't get automatically reset on system reset because they're not on a qbus). But if we're thinking about aspirational goals, I think the aspiration should be to not need to reset the CPU in its own realize function at all... thanks -- PMM