Re: [PATCH v2] hw/arm/smmuv3: Fix addr_mask for range-based invalidation

From: Peter Maydell <peter.maydell@linaro.org>
To: Zenghui Yu <yuzenghui@huawei.com>
Cc: Eric Auger <eric.auger@redhat.com>,
	qemu-arm <qemu-arm@nongnu.org>,
	QEMU Developers <qemu-devel@nongnu.org>,
	wanghaibin.wang@huawei.com
Subject: Re: [PATCH v2] hw/arm/smmuv3: Fix addr_mask for range-based invalidation
Date: Tue, 2 Feb 2021 11:30:28 +0000	[thread overview]
Message-ID: <CAFEAcA_eKjhj1262WV-cKGC6dN2JSYsVGME05VFjjj21HgL+Nw@mail.gmail.com> (raw)
In-Reply-To: <20210130043220.1345-1-yuzenghui@huawei.com>

On Sat, 30 Jan 2021 at 04:32, Zenghui Yu <yuzenghui@huawei.com> wrote:
>
> When handling guest range-based IOTLB invalidation, we should decode the TG
> field into the corresponding translation granule size so that we can pass
> the correct invalidation range to backend. Set @granule to (tg * 2 + 10) to
> properly emulate the architecture.
>
> Fixes: d52915616c05 ("hw/arm/smmuv3: Get prepared for range invalidation")
> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
> ---
> * From v1:
>   - Fix the compilation error
>
>  hw/arm/smmuv3.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index bbca0e9f20..98b99d4fe8 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -801,7 +801,7 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
>  {
>      SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu);
>      IOMMUTLBEvent event;
> -    uint8_t granule = tg;
> +    uint8_t granule;
>
>      if (!tg) {
>          SMMUEventInfo event = {.inval_ste_allowed = true};
> @@ -821,6 +821,8 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
>              return;
>          }
>          granule = tt->granule_sz;
> +    } else {
> +        granule = tg * 2 + 10;
>      }
>
>      event.type = IOMMU_NOTIFIER_UNMAP;

Applied to target-arm.next, thanks.

-- PMM