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From: Peter Maydell <peter.maydell@linaro.org>
Date: Fri, 18 Oct 2013 15:05:53 +0100
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Subject: Re: [Qemu-devel] [PATCH v1 4/4] target-arm: Add CP15 VBAR support
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To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>

On 17 October 2013 11:38, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 10 July 2013 05:23,  <peter.crosthwaite@xilinx.com> wrote:
>> From: Nathan Rossi <nathan.rossi@xilinx.com>
>>
>> Added Vector Base Address remapping on ARM v7.
>
> Apologies for this dropping off my radar for so long.
> I've had a bit of a think and I think that you're right
> that we can put in this register as part of our "random
> things we provide even though we aren't strictly implementing
> all of TZ", like the existing SCR register support.
>
>> +static int vbar_write(CPUARMState *env, const ARMCPRegInfo *ri,
>> +                      uint64_t value)
>> +{
>> +    value &= (1 << 31);
>
> This seems spurious -- we end up ignoring all but
> the high bit of the written value.
>
>> +    env->cp15.c12_vbar = value & ~0x1Ful;
>> +    return 0;
>> +}
>> +
>
> Otherwise looks OK.

Update: I've removed the spurious mask line noted above
and added the edited patch to target-arm.next.

thanks
-- PMM