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Sat, 17 Jul 2021 10:31:32 -0700 (PDT) MIME-Version: 1.0 References: <20210712154004.1410832-1-richard.henderson@linaro.org> <20210712154004.1410832-2-richard.henderson@linaro.org> In-Reply-To: <20210712154004.1410832-2-richard.henderson@linaro.org> From: Peter Maydell Date: Sat, 17 Jul 2021 18:30:52 +0100 Message-ID: Subject: Re: [PATCH v2 01/10] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS To: Richard Henderson Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=peter.maydell@linaro.org; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?B?QWxleCBCZW5uw6ll?= , Mark Cave-Ayland , QEMU Developers , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 12 Jul 2021 at 16:42, Richard Henderson wrote: > > The space reserved for CF_COUNT_MASK was overly large. > Reduce to free up cflags bits and eliminate an extra test. > > Signed-off-by: Richard Henderson > --- > include/exec/exec-all.h | 4 +++- > accel/tcg/translate-all.c | 5 ++--- > 2 files changed, 5 insertions(+), 4 deletions(-) > > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index 754f4130c9..dfe82ed19c 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -492,7 +492,9 @@ struct TranslationBlock { > target_ulong cs_base; /* CS base for this block */ > uint32_t flags; /* flags defining in which context the code was generated */ > uint32_t cflags; /* compile flags */ > -#define CF_COUNT_MASK 0x00007fff > + > +/* Note that TCG_MAX_INSNS is 512; we validate this match elsewhere. */ > +#define CF_COUNT_MASK 0x000001ff > #define CF_LAST_IO 0x00008000 /* Last insn may be an IO access. */ > #define CF_MEMI_ONLY 0x00010000 /* Only instrument memory ops */ > #define CF_USE_ICOUNT 0x00020000 > diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c > index 4df26de858..997e44c73b 100644 > --- a/accel/tcg/translate-all.c > +++ b/accel/tcg/translate-all.c > @@ -1430,9 +1430,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu, > if (max_insns == 0) { > max_insns = CF_COUNT_MASK; > } > - if (max_insns > TCG_MAX_INSNS) { > - max_insns = TCG_MAX_INSNS; > - } > + QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 != TCG_MAX_INSNS); > + Previously we would allow max_insns = TCG_MAX_INSNS (512). Now we only allow it to be 511... -- PMM