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From: Peter Maydell <peter.maydell@linaro.org>
Date: Fri, 19 Oct 2018 14:05:01 +0100
Message-ID: <CAFEAcA_oPQuQvnLFSGo_Q-7TBWJgqCBYt8mdbH8ZHc1RVcBzhA@mail.gmail.com>
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Subject: Re: [Qemu-devel] [PATCH 17/20] target/arm: Use gvec for NEON VLD
 all lanes
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To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>

On 11 October 2018 at 21:52, Richard Henderson
<richard.henderson@linaro.org> wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/translate.c | 81 ++++++++++++++----------------------------
>  1 file changed, 26 insertions(+), 55 deletions(-)

> -                /* VLD2/3/4 to all lanes: bit 5 indicates register stride */
> -                stride = (insn & (1 << 5)) ? 2 : 1;


> +            stride = insn & (1 << 5) ? 2 : 1;

You dropped the clarifying parens in the ?: expression here; I've added
them back...

thanks
-- PMM