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From: Peter Maydell <peter.maydell@linaro.org>
To: Shashi Mallela <shashi.mallela@linaro.org>
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
	Radoslaw Biernacki <rad@semihalf.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	Igor Mammedov <imammedo@redhat.com>,
	Leif Lindholm <leif@nuviainc.com>
Subject: Re: [PATCH v5 01/10] hw/intc: GICv3 ITS initial framework
Date: Mon, 5 Jul 2021 19:58:37 +0100	[thread overview]
Message-ID: <CAFEAcA_s+8DGZ0pJ2pj4-BT2W07UXGUEGcWjTSYk9DRdgX6rEg@mail.gmail.com> (raw)
In-Reply-To: <916a2c2eb368835dbd17fe0b90be541abbebde93.camel@linaro.org>

On Mon, 5 Jul 2021 at 18:04, <shashi.mallela@linaro.org> wrote:
>
> On Mon, 2021-07-05 at 17:25 +0100, Peter Maydell wrote:
> > On Mon, 5 Jul 2021 at 16:55, <shashi.mallela@linaro.org> wrote:
> > > On Mon, 2021-07-05 at 15:58 +0100, Peter Maydell wrote:
> > > > On Wed, 30 Jun 2021 at 16:32, Shashi Mallela <
> > > > shashi.mallela@linaro.org> wrote:
> > > > > Added register definitions relevant to ITS,implemented overall
> > > > > ITS device framework with stubs for ITS control and translater
> > > > > regions read/write,extended ITS common to handle mmio init
> > > > > between
> > > > > existing kvm device and newer qemu device.
> > > > >
> > > > > Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
> > > > > Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> > > > > +static void gicv3_arm_its_realize(DeviceState *dev, Error
> > > > > **errp)
> > > > > +{
> > > > > +    GICv3ITSState *s = ARM_GICV3_ITS_COMMON(dev);
> > > > > +
> > > > > +    gicv3_its_init_mmio(s, &gicv3_its_control_ops,
> > > > > &gicv3_its_translation_ops);
> > > > > +
> > > > > +    if (s->gicv3->cpu->gicr_typer & GICR_TYPER_PLPIS) {
> > > >
> > > > Can you remind me why we make this check, please? When would we
> > > > have created an ITS device but not have a GICv3 with LPI support?
> > > This check applies to GIC's physical LPI support only as against
> > > GIC's
> > > virtual LPI support.
> >
> > Right, but when would we have a GIC with no physical LPI support
> > but an ITS is present ?
> If we only support Direct injection of virtual interrupts (which can
> have their own vPEID and the vPE table),then the ITS present could havejust virtual LPI support

This patchset does not support a virtual-LPI-only ITS, though:
it doesn't support virtual LPIs at all.
If you use it with CPUs without physical LPI support , this code will skip
entirely setting GITS_TYPER and will make reset do nothing, and then the
rest of the ITS implementation will misbehave.

I think what we should do is:
 * in realize, check every CPU to make sure its redistributor
   supports physical LPIs, and return an error from realize if not
 * in reset, don't check anything

If we add virtual-LPI-only ITS support later, we can always update
this code appropriately.

thanks
-- PMM


  reply	other threads:[~2021-07-05 19:00 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-30 15:31 [PATCH v5 00/10] GICv3 LPI and ITS feature implementation Shashi Mallela
2021-06-30 15:31 ` [PATCH v5 01/10] hw/intc: GICv3 ITS initial framework Shashi Mallela
2021-07-05 14:58   ` Peter Maydell
2021-07-05 15:55     ` shashi.mallela
2021-07-05 16:25       ` Peter Maydell
2021-07-05 17:04         ` shashi.mallela
2021-07-05 18:58           ` Peter Maydell [this message]
2021-07-07  2:08             ` shashi.mallela
2021-07-06  7:44   ` Eric Auger
2021-07-07  2:06     ` shashi.mallela
2021-06-30 15:31 ` [PATCH v5 02/10] hw/intc: GICv3 ITS register definitions added Shashi Mallela
2021-07-06  9:29   ` Eric Auger
2021-07-08 17:27     ` Eric Auger
2021-08-05 21:14       ` shashi.mallela
2021-06-30 15:31 ` [PATCH v5 03/10] hw/intc: GICv3 ITS command queue framework Shashi Mallela
2021-07-06  9:31   ` Eric Auger
2021-06-30 15:31 ` [PATCH v5 04/10] hw/intc: GICv3 ITS Command processing Shashi Mallela
2021-07-05 14:07   ` Peter Maydell
2021-07-06  9:27     ` Eric Auger
2021-07-07  2:02       ` shashi.mallela
2021-07-05 14:54   ` Peter Maydell
2021-07-06  0:47     ` shashi.mallela
2021-07-06  3:25       ` shashi.mallela
2021-07-06  9:19         ` Peter Maydell
2021-07-06 12:46           ` shashi.mallela
2021-07-06 13:27             ` Peter Maydell
2021-07-07  2:08               ` shashi.mallela
2021-07-06 10:04         ` Eric Auger
2021-07-06 10:07           ` Peter Maydell
2021-07-06 10:05   ` Eric Auger
2021-06-30 15:31 ` [PATCH v5 05/10] hw/intc: GICv3 ITS Feature enablement Shashi Mallela
2021-07-05 14:20   ` Peter Maydell
2021-06-30 15:31 ` [PATCH v5 06/10] hw/intc: GICv3 redistributor ITS processing Shashi Mallela
2021-07-05 14:43   ` Peter Maydell
2021-06-30 15:31 ` [PATCH v5 07/10] hw/arm/sbsa-ref: add ITS support in SBSA GIC Shashi Mallela
2021-07-05 14:59   ` Peter Maydell
2021-06-30 15:31 ` [PATCH v5 08/10] tests/data/acpi/virt: Add IORT files for ITS Shashi Mallela
2021-06-30 15:31 ` [PATCH v5 09/10] hw/arm/virt: add ITS support in virt GIC Shashi Mallela
2021-06-30 15:31 ` [PATCH v5 10/10] tests/data/acpi/virt: Update IORT files for ITS Shashi Mallela
2021-07-05 15:02   ` Peter Maydell
2021-07-05 15:05 ` [PATCH v5 00/10] GICv3 LPI and ITS feature implementation Peter Maydell

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