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From: Peter Maydell <peter.maydell@linaro.org>
Date: Fri, 14 Aug 2015 11:24:45 +0100
Message-ID: <CAFEAcA_sLQ0S-ptR0+Uw9rPT-AkxDLFVHWU2qEsALuxxdUMPxA@mail.gmail.com>
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Subject: Re: [Qemu-devel] [PATCH 1/6] cputlb: Add functions for flushing TLB
 for a single MMU index
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To: QEMU Developers <qemu-devel@nongnu.org>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>, Patch Tracking <patches@linaro.org>, =?UTF-8?B?QWxleCBCZW5uw6ll?= <alex.bennee@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>

On 7 August 2015 at 13:33, Peter Maydell <peter.maydell@linaro.org> wrote:
> Guest CPU TLB maintenance operations may be sufficiently
> specialized to only need to flush TLB entries corresponding
> to a particular MMU index. Implement cputlb functions for
> this, to avoid the inefficiency of flushing TLB entries
> which we don't need to.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  cputlb.c                | 81 +++++++++++++++++++++++++++++++++++++++++++++++++
>  include/exec/exec-all.h | 47 ++++++++++++++++++++++++++++
>  2 files changed, 128 insertions(+)
>
> diff --git a/cputlb.c b/cputlb.c
> index a506086..a1996ba 100644
> --- a/cputlb.c
> +++ b/cputlb.c
> @@ -69,6 +69,39 @@ void tlb_flush(CPUState *cpu, int flush_global)
>      tlb_flush_count++;
>  }
>
> +static inline void v_tlb_flush_by_mmuidx(CPUState *cpu, va_list argp)
> +{
> +    CPUArchState *env = cpu->env_ptr;
> +
> +#if defined(DEBUG_TLB)
> +    printf("tlb_flush_by_mmuidx %d:\n", mmu_idx);
> +#endif

This debug tracing doesn't compile if enabled -- it was written
to go with my initial implementation which took a single
mmu_idx rather than varargs, and I forgot to update it. I'll
send out a v2 shortly.

thanks
-- PMM