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Thu, 21 Apr 2022 09:15:19 -0700 (PDT) MIME-Version: 1.0 References: <20220417174426.711829-1-richard.henderson@linaro.org> <20220417174426.711829-8-richard.henderson@linaro.org> In-Reply-To: <20220417174426.711829-8-richard.henderson@linaro.org> From: Peter Maydell Date: Thu, 21 Apr 2022 17:15:08 +0100 Message-ID: Subject: Re: [PATCH v3 07/60] target/arm: Extend store_cpu_offset to take field size To: Richard Henderson Content-Type: text/plain; charset="UTF-8" Received-SPF: pass client-ip=2607:f8b0:4864:20::b35; envelope-from=peter.maydell@linaro.org; helo=mail-yb1-xb35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Sun, 17 Apr 2022 at 18:50, Richard Henderson wrote: > > Currently we assume all fields are 32-bit. > Prepare for fields of a single byte, using sizeof. > > Signed-off-by: Richard Henderson > --- > target/arm/translate-a32.h | 13 +++++-------- > target/arm/translate.c | 21 ++++++++++++++++++++- > 2 files changed, 25 insertions(+), 9 deletions(-) > > diff --git a/target/arm/translate-a32.h b/target/arm/translate-a32.h > index 5be4b9b834..f593740a88 100644 > --- a/target/arm/translate-a32.h > +++ b/target/arm/translate-a32.h > @@ -61,17 +61,14 @@ static inline TCGv_i32 load_cpu_offset(int offset) > > #define load_cpu_field(name) load_cpu_offset(offsetof(CPUARMState, name)) > > -static inline void store_cpu_offset(TCGv_i32 var, int offset) > -{ > - tcg_gen_st_i32(var, cpu_env, offset); > - tcg_temp_free_i32(var); > -} > +void store_cpu_offset(TCGv_i32 var, int offset, int size); > > -#define store_cpu_field(var, name) \ > - store_cpu_offset(var, offsetof(CPUARMState, name)) > +#define store_cpu_field(var, name) \ > + store_cpu_offset(var, offsetof(CPUARMState, name), \ > + sizeof(((CPUARMState *)NULL)->name)) compiler.h defines sizeof_field, so you can write sizeof_field(CPUARMState, name) here. Otherwise Reviewed-by: Peter Maydell thanks -- PMM