From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:40152) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkCet-0001PX-Ka for qemu-devel@nongnu.org; Thu, 17 Jan 2019 13:44:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gkCet-0000Ls-0M for qemu-devel@nongnu.org; Thu, 17 Jan 2019 13:44:55 -0500 Received: from mail-oi1-x241.google.com ([2607:f8b0:4864:20::241]:35047) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gkCes-0000JP-SJ for qemu-devel@nongnu.org; Thu, 17 Jan 2019 13:44:54 -0500 Received: by mail-oi1-x241.google.com with SMTP id v6so7009349oif.2 for ; Thu, 17 Jan 2019 10:44:54 -0800 (PST) MIME-Version: 1.0 References: <20190111125759.31577-1-clg@kaod.org> In-Reply-To: <20190111125759.31577-1-clg@kaod.org> From: Peter Maydell Date: Thu, 17 Jan 2019 18:44:42 +0000 Message-ID: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] ftgmac100: implement the new MDIO interface on Aspeed SoC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= Cc: QEMU Developers , qemu-arm , Joel Stanley , Andrew Jeffery , Jason Wang On Fri, 11 Jan 2019 at 12:58, C=C3=A9dric Le Goater wrote: > > The PHY behind the MAC of an Aspeed SoC can be controlled using two > different MDC/MDIO interfaces. The same registers PHYCR (MAC60) and > PHYDATA (MAC64) are involved but they have a different layout. > > BIT31 of the Feature Register (MAC40) controls which MDC/MDIO > interface is active. > > Signed-off-by: C=C3=A9dric Le Goater > --- Applied to target-arm.next, thanks. -- PMM