[PATCH 0/2] Add Versal compatible string to Macb driver

[PATCH 0/2] Add Versal compatible string to Macb driver

[Harini Katakam]

Add Versal device support.

Harini Katakam (1):
  net: macb: Update tsu clk usage in runtime suspend/resume for Versal

Radhey Shyam Pandey (1):
  dt-bindings: net: cdns,macb: Add versal compatible string

 .../devicetree/bindings/net/cdns,macb.yaml      |  1 +
 drivers/net/ethernet/cadence/macb.h             |  1 +
 drivers/net/ethernet/cadence/macb_main.c        | 17 +++++++++++++++--
 3 files changed, 17 insertions(+), 2 deletions(-)

-- 
2.17.1

[PATCH 1/2] dt-bindings: net: cdns,macb: Add versal compatible string

[Harini Katakam]

From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>

Add versal compatible string.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
---
 Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
index 9c92156869b2..1e9f49bb8249 100644
--- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
+++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
@@ -22,6 +22,7 @@ properties:
           - enum:
               - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
               - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
+              - cdns,versal-gem       # Xilinx Versal
           - const: cdns,gem           # Generic
 
       - items:
-- 
2.17.1

[PATCH 2/2] net: macb: Update tsu clk usage in runtime suspend/resume for Versal

[Harini Katakam]

On Versal TSU clock cannot be disabled irrespective of whether PTP is
used. Hence introduce a new Versal config structure with a "need tsu"
caps flag and check the same in runtime_suspend/resume before cutting
off clocks.

More information on this for future reference:
This is an IP limitation on versions 1p11 and 1p12 when Qbv is enabled
(See designcfg1, bit 3). However it is better to rely on an SoC specific
check rather than the IP version because tsu clk property itself may not
represent actual HW tsu clock on some chip designs.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
---
 drivers/net/ethernet/cadence/macb.h      |  1 +
 drivers/net/ethernet/cadence/macb_main.c | 17 +++++++++++++++--
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 7ca077b65eaa..8bf67b44b466 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -725,6 +725,7 @@
 #define MACB_CAPS_MACB_IS_GEM			0x80000000
 #define MACB_CAPS_PCS				0x01000000
 #define MACB_CAPS_HIGH_SPEED			0x02000000
+#define MACB_CAPS_NEED_TSUCLK			0x00001000
 
 /* LSO settings */
 #define MACB_LSO_UFO_ENABLE			0x01
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 7eb7822cd184..8bbc46e8a9eb 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4735,6 +4735,16 @@ static const struct macb_config zynqmp_config = {
 	.usrio = &macb_default_usrio,
 };
 
+static const struct macb_config versal_config = {
+	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
+		MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK,
+	.dma_burst_length = 16,
+	.clk_init = macb_clk_init,
+	.init = init_reset_optional,
+	.jumbo_max_len = 10240,
+	.usrio = &macb_default_usrio,
+};
+
 static const struct macb_config zynq_config = {
 	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_NO_GIGABIT_HALF |
 		MACB_CAPS_NEEDS_RSTONUBR,
@@ -4794,6 +4804,7 @@ static const struct of_device_id macb_dt_ids[] = {
 	{ .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
 	{ .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
 	{ .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },
+	{ .compatible = "cdns,versal-gem", .data = &versal_config},
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, macb_dt_ids);
@@ -5203,7 +5214,7 @@ static int __maybe_unused macb_runtime_suspend(struct device *dev)
 
 	if (!(device_may_wakeup(dev)))
 		macb_clks_disable(bp->pclk, bp->hclk, bp->tx_clk, bp->rx_clk, bp->tsu_clk);
-	else
+	else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK))
 		macb_clks_disable(NULL, NULL, NULL, NULL, bp->tsu_clk);
 
 	return 0;
@@ -5219,8 +5230,10 @@ static int __maybe_unused macb_runtime_resume(struct device *dev)
 		clk_prepare_enable(bp->hclk);
 		clk_prepare_enable(bp->tx_clk);
 		clk_prepare_enable(bp->rx_clk);
+		clk_prepare_enable(bp->tsu_clk);
+	} else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK)) {
+		clk_prepare_enable(bp->tsu_clk);
 	}
-	clk_prepare_enable(bp->tsu_clk);
 
 	return 0;
 }
-- 
2.17.1

Re: [PATCH 1/2] dt-bindings: net: cdns,macb: Add versal compatible string

[Krzysztof Kozlowski]

On 20/07/2022 13:29, Harini Katakam wrote:
> From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> 
> Add versal compatible string.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
> ---
>  Documentation/devicetree/bindings/net/cdns,macb.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> index 9c92156869b2..1e9f49bb8249 100644
> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> @@ -22,6 +22,7 @@ properties:
>            - enum:
>                - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
>                - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
> +              - cdns,versal-gem       # Xilinx Versal

Not really ordered by name. Why adding to the end?

Best regards,
Krzysztof

RE: [PATCH 1/2] dt-bindings: net: cdns,macb: Add versal compatible string

[Katakam, Harini]

Hi Krzysztof,

<snip>
> > diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> > index 9c92156869b2..1e9f49bb8249 100644
> > --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
> > +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
> > @@ -22,6 +22,7 @@ properties:
> >            - enum:
> >                - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
> >                - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
> > +              - cdns,versal-gem       # Xilinx Versal
> 
> Not really ordered by name. Why adding to the end?

Thanks for the review. It is just based on the order in which device
families from Xilinx were released. I can alphabetize if that's preferred.

Regards,
Harini

Re: [PATCH 1/2] dt-bindings: net: cdns,macb: Add versal compatible string

[Krzysztof Kozlowski]

On 20/07/2022 13:36, Katakam, Harini wrote:
>>> diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml
>> b/Documentation/devicetree/bindings/net/cdns,macb.yaml
>>> index 9c92156869b2..1e9f49bb8249 100644
>>> --- a/Documentation/devicetree/bindings/net/cdns,macb.yaml
>>> +++ b/Documentation/devicetree/bindings/net/cdns,macb.yaml
>>> @@ -22,6 +22,7 @@ properties:
>>>            - enum:
>>>                - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC
>>>                - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC
>>> +              - cdns,versal-gem       # Xilinx Versal
>>
>> Not really ordered by name. Why adding to the end?
> 
> Thanks for the review. It is just based on the order in which device
> families from Xilinx were released. I can alphabetize if that's preferred.

Yes, it's the easiest way to avoid conflicts.

Best regards,
Krzysztof

Re: [PATCH 2/2] net: macb: Update tsu clk usage in runtime suspend/resume for Versal

[Claudiu.Beznea]

On 20.07.2022 14:29, Harini Katakam wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Versal TSU clock cannot be disabled irrespective of whether PTP is
> used. Hence introduce a new Versal config structure with a "need tsu"
> caps flag and check the same in runtime_suspend/resume before cutting
> off clocks.
> 
> More information on this for future reference:
> This is an IP limitation on versions 1p11 and 1p12 when Qbv is enabled
> (See designcfg1, bit 3). However it is better to rely on an SoC specific
> check rather than the IP version because tsu clk property itself may not
> represent actual HW tsu clock on some chip designs.
> 
> Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> ---
>  drivers/net/ethernet/cadence/macb.h      |  1 +
>  drivers/net/ethernet/cadence/macb_main.c | 17 +++++++++++++++--
>  2 files changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index 7ca077b65eaa..8bf67b44b466 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -725,6 +725,7 @@
>  #define MACB_CAPS_MACB_IS_GEM                  0x80000000
>  #define MACB_CAPS_PCS                          0x01000000
>  #define MACB_CAPS_HIGH_SPEED                   0x02000000
> +#define MACB_CAPS_NEED_TSUCLK                  0x00001000

Can you keep this sorted by the bit position used?

> 
>  /* LSO settings */
>  #define MACB_LSO_UFO_ENABLE                    0x01
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 7eb7822cd184..8bbc46e8a9eb 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -4735,6 +4735,16 @@ static const struct macb_config zynqmp_config = {
>         .usrio = &macb_default_usrio,
>  };
> 
> +static const struct macb_config versal_config = {
> +       .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
> +               MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK,
> +       .dma_burst_length = 16,
> +       .clk_init = macb_clk_init,
> +       .init = init_reset_optional,
> +       .jumbo_max_len = 10240,
> +       .usrio = &macb_default_usrio,
> +};
> +

Also, could you keep this not b/w zynq configs to have a bit of sort of these?

Other than this:

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>


>  static const struct macb_config zynq_config = {
>         .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_NO_GIGABIT_HALF |
>                 MACB_CAPS_NEEDS_RSTONUBR,
> @@ -4794,6 +4804,7 @@ static const struct of_device_id macb_dt_ids[] = {
>         { .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
>         { .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
>         { .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },
> +       { .compatible = "cdns,versal-gem", .data = &versal_config},
>         { /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, macb_dt_ids);
> @@ -5203,7 +5214,7 @@ static int __maybe_unused macb_runtime_suspend(struct device *dev)
> 
>         if (!(device_may_wakeup(dev)))
>                 macb_clks_disable(bp->pclk, bp->hclk, bp->tx_clk, bp->rx_clk, bp->tsu_clk);
> -       else
> +       else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK))
>                 macb_clks_disable(NULL, NULL, NULL, NULL, bp->tsu_clk);
> 
>         return 0;
> @@ -5219,8 +5230,10 @@ static int __maybe_unused macb_runtime_resume(struct device *dev)
>                 clk_prepare_enable(bp->hclk);
>                 clk_prepare_enable(bp->tx_clk);
>                 clk_prepare_enable(bp->rx_clk);
> +               clk_prepare_enable(bp->tsu_clk);
> +       } else if (!(bp->caps & MACB_CAPS_NEED_TSUCLK)) {
> +               clk_prepare_enable(bp->tsu_clk);
>         }
> -       clk_prepare_enable(bp->tsu_clk);
> 
>         return 0;
>  }
> --
> 2.17.1
> 

Re: [PATCH 2/2] net: macb: Update tsu clk usage in runtime suspend/resume for Versal

[Harini Katakam]

Hi Claudiu,

On Fri, Jul 22, 2022 at 1:55 PM <Claudiu.Beznea@microchip.com> wrote:
>
> On 20.07.2022 14:29, Harini Katakam wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > On Versal TSU clock cannot be disabled irrespective of whether PTP is
> > used. Hence introduce a new Versal config structure with a "need tsu"
> > caps flag and check the same in runtime_suspend/resume before cutting
> > off clocks.
> >
> > More information on this for future reference:
> > This is an IP limitation on versions 1p11 and 1p12 when Qbv is enabled
> > (See designcfg1, bit 3). However it is better to rely on an SoC specific
> > check rather than the IP version because tsu clk property itself may not
> > represent actual HW tsu clock on some chip designs.
> >
> > Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> > ---
> >  drivers/net/ethernet/cadence/macb.h      |  1 +
> >  drivers/net/ethernet/cadence/macb_main.c | 17 +++++++++++++++--
> >  2 files changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> > index 7ca077b65eaa..8bf67b44b466 100644
> > --- a/drivers/net/ethernet/cadence/macb.h
> > +++ b/drivers/net/ethernet/cadence/macb.h
> > @@ -725,6 +725,7 @@
> >  #define MACB_CAPS_MACB_IS_GEM                  0x80000000
> >  #define MACB_CAPS_PCS                          0x01000000
> >  #define MACB_CAPS_HIGH_SPEED                   0x02000000
> > +#define MACB_CAPS_NEED_TSUCLK                  0x00001000
>
> Can you keep this sorted by the bit position used?

Thanks for the review.
Sure, I'll sort these in a separate patch first in the same series.

>
> >
> >  /* LSO settings */
> >  #define MACB_LSO_UFO_ENABLE                    0x01
> > diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> > index 7eb7822cd184..8bbc46e8a9eb 100644
> > --- a/drivers/net/ethernet/cadence/macb_main.c
> > +++ b/drivers/net/ethernet/cadence/macb_main.c
> > @@ -4735,6 +4735,16 @@ static const struct macb_config zynqmp_config = {
> >         .usrio = &macb_default_usrio,
> >  };
> >
> > +static const struct macb_config versal_config = {
> > +       .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
> > +               MACB_CAPS_GEM_HAS_PTP | MACB_CAPS_BD_RD_PREFETCH | MACB_CAPS_NEED_TSUCLK,
> > +       .dma_burst_length = 16,
> > +       .clk_init = macb_clk_init,
> > +       .init = init_reset_optional,
> > +       .jumbo_max_len = 10240,
> > +       .usrio = &macb_default_usrio,
> > +};
> > +
>
> Also, could you keep this not b/w zynq configs to have a bit of sort of these?
>
> Other than this:
>
> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>

Thanks.

Regards,
Harini