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From: Harini Katakam <harinikatakamlinux@gmail.com>
To: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
Cc: Punnaiah Choudary Kalluri <punnaiah.choudary.kalluri@xilinx.com>,
	broonie@kernel.org, Grant Likely <grant.likely@linaro.org>,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	"ijc+devicetree@hellion.org.uk" <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	linux-spi@vger.kernel.org,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Punnaiah Choudary <kpc528@gmail.com>,
	kalluripunnaiahchoudary@gmail.com,
	Punnaiah Choudary Kalluri <punnaia@xilinx.com>,
	Harini Katakam <harinik@xilinx.com>
Subject: Re: [PATCH 1/2] devicetree: Add devicetree bindings documentation for Zynq Quad SPI
Date: Fri, 4 Apr 2014 00:15:17 +0530	[thread overview]
Message-ID: <CAFcVECLoB8BR0PVfV=1EVQub8weOOYustg-1DqOevaihCT3JqQ@mail.gmail.com> (raw)
In-Reply-To: <46a3a23e-786e-4acf-aa42-c3808b1a46d3@CH1EHSMHS028.ehs.local>

Hi Soren

On Thu, Apr 3, 2014 at 11:20 PM, Sören Brinkmann
<soren.brinkmann@xilinx.com> wrote:
> Hi Punnaiah,
>
> On Thu, 2014-04-03 at 10:33PM +0530, Punnaiah Choudary Kalluri wrote:
>> Add bindings documentation for Zynq Quad SPI driver.
>>
>> Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
>> ---
>>  .../devicetree/bindings/spi/spi-zynq-qspi.txt      |   26 ++++++++++++++++++++
>>  1 file changed, 26 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
>> new file mode 100644
>> index 0000000..88e00f8
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
>> @@ -0,0 +1,26 @@
>> +Xilinx Zynq QSPI controller Device Tree Bindings
>> +-------------------------------------------------
>> +
>> +Required properties:
>> +- compatible         : Should be "xlnx,zynq-qspi-1.0".
>> +- reg                        : Physical base address and size of QSPI registers map.
>> +- interrupts         : Property with a value describing the interrupt
>> +                       number.
>> +- interrupt-parent   : Must be core interrupt controller
>> +- clock-names                : List of input clock names - "ref_clk", "aper_clk"
>> +                       (See clock bindings for details).
>> +- clocks             : Clock phandles (see clock bindings for details).
>> +
>> +Optional properties:
>> +- num-cs             : Number of chip selects used.
>> +
>> +Example:
>> +     qspi@e000d000 {
>> +             compatible = "xlnx,zynq-qspi-1.0";
>> +             clock-names = "ref_clk", "aper_clk";
>
> These seem to be the SOC names of the clocks. Doesn't have the IP its
> own naming for these clock inputs?
>

The IP design spec uses the name ref_clk.
There is no particular clock name used for for APB clock.
So I think aper_clk is a valid name to use.

Regards,
Harini

  reply	other threads:[~2014-04-03 18:45 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-03 17:03 [PATCH 1/2] devicetree: Add devicetree bindings documentation for Zynq Quad SPI Punnaiah Choudary Kalluri
2014-04-03 17:03 ` Punnaiah Choudary Kalluri
2014-04-03 17:03 ` Punnaiah Choudary Kalluri
2014-04-03 17:50 ` Sören Brinkmann
2014-04-03 17:50   ` Sören Brinkmann
2014-04-03 18:45   ` Harini Katakam [this message]
2014-04-03 18:54     ` Sören Brinkmann
2014-04-03 18:54       ` Sören Brinkmann
2014-04-03 21:01 ` Mark Brown
2014-04-03 21:01   ` Mark Brown
2014-04-04  3:01   ` Harini Katakam
2014-04-04  3:01     ` Harini Katakam
2014-04-04  5:38     ` Michal Simek
2014-04-04  5:38       ` Michal Simek

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