[PATCH 0/2] PCI: altera: fix link retrain

[PATCH 0/2] PCI: altera: fix link retrain

[Ley Foon Tan]

This 2 patches fix the issue before and after retrain link.

Ley Foon Tan (2):
  PCI: altera: check link status before retrain link
  PCI: altera: Polling for link up status after retrain the link

 drivers/pci/host/pcie-altera.c | 48 +++++++++++++++++++++++++++---------------
 1 file changed, 31 insertions(+), 17 deletions(-)

-- 
1.8.2.1

[PATCH 1/2] PCI: altera: check link status before retrain link

[Ley Foon Tan]

Checking for link up status before retrain link.

Note, moves altera_pcie_link_is_up() and its dependency functions
to top of file.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
---
 drivers/pci/host/pcie-altera.c | 36 ++++++++++++++++++++----------------
 1 file changed, 20 insertions(+), 16 deletions(-)

diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index dbac6fb..78f77e1 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -81,9 +81,29 @@ struct tlp_rp_regpair_t {
 	u32 reg1;
 };
 
+static inline void cra_writel(struct altera_pcie *pcie, const u32 value,
+			      const u32 reg)
+{
+	writel_relaxed(value, pcie->cra_base + reg);
+}
+
+static inline u32 cra_readl(struct altera_pcie *pcie, const u32 reg)
+{
+	return readl_relaxed(pcie->cra_base + reg);
+}
+
+static bool altera_pcie_link_is_up(struct altera_pcie *pcie)
+{
+	return !!((cra_readl(pcie, RP_LTSSM) & RP_LTSSM_MASK) == LTSSM_L0);
+}
+
 static void altera_pcie_retrain(struct pci_dev *dev)
 {
 	u16 linkcap, linkstat;
+	struct altera_pcie *pcie = dev->bus->sysdata;
+
+	if(!altera_pcie_link_is_up(pcie))
+		return;
 
 	/*
 	 * Set the retrain bit if the PCIe rootport support > 2.5GB/s, but
@@ -120,17 +140,6 @@ static bool altera_pcie_hide_rc_bar(struct pci_bus *bus, unsigned int  devfn,
 	return false;
 }
 
-static inline void cra_writel(struct altera_pcie *pcie, const u32 value,
-			      const u32 reg)
-{
-	writel_relaxed(value, pcie->cra_base + reg);
-}
-
-static inline u32 cra_readl(struct altera_pcie *pcie, const u32 reg)
-{
-	return readl_relaxed(pcie->cra_base + reg);
-}
-
 static void tlp_write_tx(struct altera_pcie *pcie,
 			 struct tlp_rp_regpair_t *tlp_rp_regdata)
 {
@@ -139,11 +148,6 @@ static void tlp_write_tx(struct altera_pcie *pcie,
 	cra_writel(pcie, tlp_rp_regdata->ctrl, RP_TX_CNTRL);
 }
 
-static bool altera_pcie_link_is_up(struct altera_pcie *pcie)
-{
-	return !!((cra_readl(pcie, RP_LTSSM) & RP_LTSSM_MASK) == LTSSM_L0);
-}
-
 static bool altera_pcie_valid_config(struct altera_pcie *pcie,
 				     struct pci_bus *bus, int dev)
 {
-- 
1.8.2.1

[PATCH 2/2] PCI: altera: Polling for link up status after retrain the link

[Ley Foon Tan]

Some PCIe devices take longer time to reach link up state after retrain.
This patch polling for link up status after retrain the link. This is to
make sure the link is stable and up before we access to configuration space
registers after this.

Signed-off-by: Ley Foon Tan <lftan@altera.com>
---
 drivers/pci/host/pcie-altera.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c
index 78f77e1..a9de2a0 100644
--- a/drivers/pci/host/pcie-altera.c
+++ b/drivers/pci/host/pcie-altera.c
@@ -61,6 +61,8 @@
 #define TLP_LOOP			500
 #define RP_DEVFN			0
 
+#define LINK_UP_TIMEOUT			5000
+
 #define INTX_NUM			4
 
 #define DWORD_MASK			3
@@ -101,6 +103,7 @@ static void altera_pcie_retrain(struct pci_dev *dev)
 {
 	u16 linkcap, linkstat;
 	struct altera_pcie *pcie = dev->bus->sysdata;
+	int timeout =  0;
 
 	if(!altera_pcie_link_is_up(pcie))
 		return;
@@ -115,9 +118,16 @@ static void altera_pcie_retrain(struct pci_dev *dev)
 		return;
 
 	pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &linkstat);
-	if ((linkstat & PCI_EXP_LNKSTA_CLS) == PCI_EXP_LNKSTA_CLS_2_5GB)
+	if ((linkstat & PCI_EXP_LNKSTA_CLS) == PCI_EXP_LNKSTA_CLS_2_5GB) {
 		pcie_capability_set_word(dev, PCI_EXP_LNKCTL,
 					 PCI_EXP_LNKCTL_RL);
+		while(!altera_pcie_link_is_up(pcie)) {
+			timeout++;
+			if (timeout > LINK_UP_TIMEOUT)
+				break;
+			udelay(5);
+		}
+	}
 }
 DECLARE_PCI_FIXUP_EARLY(0x1172, PCI_ANY_ID, altera_pcie_retrain);
 
-- 
1.8.2.1

Re: [PATCH 0/2] PCI: altera: fix link retrain

[Ley Foon Tan]

On Tue, Jun 21, 2016 at 4:53 PM, Ley Foon Tan <lftan@altera.com> wrote:
>
> This 2 patches fix the issue before and after retrain link.
>
> Ley Foon Tan (2):
>   PCI: altera: check link status before retrain link
>   PCI: altera: Polling for link up status after retrain the link
>
>  drivers/pci/host/pcie-altera.c | 48 +++++++++++++++++++++++++++---------------
>  1 file changed, 31 insertions(+), 17 deletions(-)
>

Hi Bjorn

Do you any comment on these 2 patches?

Regards
Ley Foon

Re: [PATCH 0/2] PCI: altera: fix link retrain

[Ley Foon Tan]

On Tue, Jul 12, 2016 at 6:19 PM, Ley Foon Tan <lftan@altera.com> wrote:
>
> On Tue, Jun 21, 2016 at 4:53 PM, Ley Foon Tan <lftan@altera.com> wrote:
> >
> > This 2 patches fix the issue before and after retrain link.
> >
> > Ley Foon Tan (2):
> >   PCI: altera: check link status before retrain link
> >   PCI: altera: Polling for link up status after retrain the link
> >
> >  drivers/pci/host/pcie-altera.c | 48 +++++++++++++++++++++++++++---------------
> >  1 file changed, 31 insertions(+), 17 deletions(-)
> >
>
> Hi Bjorn
>
> Do you any comment on these 2 patches?
>
> Regards
> Ley Foon

Hi Bjorn

Do you have any chance take a look these 2 patches? Hope they can go
into 4.8-rc1.
Thanks.


Regards
Ley Foon

Re: [PATCH 0/2] PCI: altera: fix link retrain

[Bjorn Helgaas]

On Tue, Jun 21, 2016 at 04:53:11PM +0800, Ley Foon Tan wrote:
> This 2 patches fix the issue before and after retrain link.
> 
> Ley Foon Tan (2):
>   PCI: altera: check link status before retrain link
>   PCI: altera: Polling for link up status after retrain the link
> 
>  drivers/pci/host/pcie-altera.c | 48 +++++++++++++++++++++++++++---------------
>  1 file changed, 31 insertions(+), 17 deletions(-)

I applied these to pci/host-altera for v4.8, thanks!

I split the code move into its own patch so the bug fix is clearly
visible.  I also fixed these whitespace errors:

  if(!altera_pcie_link_is_up(pcie))
  while(!altera_pcie_link_is_up(pcie)) {

A space is required after "if" and "while".

Re: [PATCH 0/2] PCI: altera: fix link retrain

[Ley Foon Tan]

On Sat, Jul 23, 2016 at 5:07 AM, Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> On Tue, Jun 21, 2016 at 04:53:11PM +0800, Ley Foon Tan wrote:
> > This 2 patches fix the issue before and after retrain link.
> >
> > Ley Foon Tan (2):
> >   PCI: altera: check link status before retrain link
> >   PCI: altera: Polling for link up status after retrain the link
> >
> >  drivers/pci/host/pcie-altera.c | 48 +++++++++++++++++++++++++++---------------
> >  1 file changed, 31 insertions(+), 17 deletions(-)
>
> I applied these to pci/host-altera for v4.8, thanks!
>
> I split the code move into its own patch so the bug fix is clearly
> visible.  I also fixed these whitespace errors:
>
>   if(!altera_pcie_link_is_up(pcie))
>   while(!altera_pcie_link_is_up(pcie)) {
>
> A space is required after "if" and "while".
Hi Bjorn

Thanks a lot!

Regards
Ley Foon