From mboxrd@z Thu Jan 1 00:00:00 1970 From: Quan Nguyen Subject: Re: [PATCH v5 2/3] Documentation: gpio: Update description for X-Gene standby GPIO controller DTS binding Date: Sat, 13 Feb 2016 10:21:31 +0700 Message-ID: References: <1454041735-8434-1-git-send-email-qnguyen@apm.com> <1454041735-8434-3-git-send-email-qnguyen@apm.com> <20160201153502.GA19725@rob-hp-laptop> <20160212143616.GA1603@rob-hp-laptop> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Received: from mail-vk0-f45.google.com ([209.85.213.45]:36485 "EHLO mail-vk0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750823AbcBMDVc (ORCPT ); Fri, 12 Feb 2016 22:21:32 -0500 Received: by mail-vk0-f45.google.com with SMTP id c3so74283967vkb.3 for ; Fri, 12 Feb 2016 19:21:32 -0800 (PST) In-Reply-To: <20160212143616.GA1603@rob-hp-laptop> Sender: linux-gpio-owner@vger.kernel.org List-Id: linux-gpio@vger.kernel.org To: Rob Herring Cc: Linus Walleij , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Gleixner , Jason Cooper , Marc Zyngier , Y Vo , Phong Vo , Loc Ho , Feng Kan , Duc Dang , patches On Fri, Feb 12, 2016 at 9:36 PM, Rob Herring wrote: > On Tue, Feb 02, 2016 at 08:46:25AM +0700, Quan Nguyen wrote: >> On Mon, Feb 1, 2016 at 10:35 PM, Rob Herring wrote: >> > On Fri, Jan 29, 2016 at 11:28:54AM +0700, Quan Nguyen wrote: >> >> Update description for X-Gene standby GPIO controller DTS binding to >> >> support GPIO line configuration as input, output or external IRQ pin. >> >> >> >> Signed-off-by: Y Vo >> >> Signed-off-by: Quan Nguyen >> >> --- >> >> .../devicetree/bindings/gpio/gpio-xgene-sb.txt | 47 ++++++++++++++++++---- >> >> 1 file changed, 40 insertions(+), 7 deletions(-) >> >> >> >> diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt >> >> index dae1300..7b8b4cb 100644 >> >> --- a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt >> >> +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt >> >> @@ -1,10 +1,20 @@ >> >> APM X-Gene Standby GPIO controller bindings >> >> >> >> -This is a gpio controller in the standby domain. >> >> - >> >> -There are 20 GPIO pins from 0..21. There is no GPIO_DS14 or GPIO_DS15, >> >> -only GPIO_DS8..GPIO_DS13 support interrupts. The IRQ mapping >> >> -is currently 1-to-1 on interrupts 0x28 thru 0x2d. >> >> +This is a gpio controller in the standby domain. It also supports interrupt in >> >> +some particular pins which are sourced to its parent interrupt controller >> >> +as diagram below: >> >> + +-----------------+ >> >> + | X-Gene standby | >> >> + | GPIO controller +--------- GPIO_0 >> >> ++------------+ | | ... >> >> +| Parent IRQ | | +--------- GPIO_8/EXT_INT_0 >> >> +| controller | EXT_INT_0 | | ... >> >> +| (GICv2) +-------------+ +--------- GPIO_[N+8]/EXT_INT_N >> >> +| | ... | | >> >> +| | EXT_INT_N | +--------- GPIO_[N+9] >> >> +| +-------------+ | ... >> >> +| | | +--------- GPIO_MAX >> >> ++------------+ +-----------------+ >> >> >> >> Required properties: >> >> - compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller >> >> @@ -15,10 +25,18 @@ Required properties: >> >> 0 = active high >> >> 1 = active low >> >> - gpio-controller: Marks the device node as a GPIO controller. >> >> -- interrupts: Shall contain exactly 6 interrupts. >> >> +- interrupts: The EXT_INT_0 parent interrupt resource must be listed first. >> >> +- interrupt-parent: Phandle of the parent interrupt controller. >> >> +- interrupt-cells: Should be two. >> >> + - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N. >> >> + - second cell is used to specify flags. >> >> +- interrupt-controller: Marks the device node as an interrupt controller. >> >> +- apm,nr-gpios: Optional, specify number of gpios pin. >> >> +- apm,nr-irqs: Optional, specify number of interrupt pins. >> > >> > When is this not 6? >> > >> Hi Rob, by default, this should be 6, but I think this property can >> help in cases: >> + Used only 5(or less) first pin as interrupt. >> + For similar device which has different interrupt pins (8 for example). >> My idea is to make it a bit more generic by using this optional property. > > What is similar device? Another SoC? board? Is 6 fixed in the SoC? I > think you need more specific compatible string with the SoC name in it > to determine these setting rather than trying to do something generic. > I agree, Rob, compatible string should be suit for other SoC, but I think we still need this property for case of less than 6 interrupts are needed. Thanks, -- Quan Nguyen From mboxrd@z Thu Jan 1 00:00:00 1970 From: qnguyen@apm.com (Quan Nguyen) Date: Sat, 13 Feb 2016 10:21:31 +0700 Subject: [PATCH v5 2/3] Documentation: gpio: Update description for X-Gene standby GPIO controller DTS binding In-Reply-To: <20160212143616.GA1603@rob-hp-laptop> References: <1454041735-8434-1-git-send-email-qnguyen@apm.com> <1454041735-8434-3-git-send-email-qnguyen@apm.com> <20160201153502.GA19725@rob-hp-laptop> <20160212143616.GA1603@rob-hp-laptop> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Feb 12, 2016 at 9:36 PM, Rob Herring wrote: > On Tue, Feb 02, 2016 at 08:46:25AM +0700, Quan Nguyen wrote: >> On Mon, Feb 1, 2016 at 10:35 PM, Rob Herring wrote: >> > On Fri, Jan 29, 2016 at 11:28:54AM +0700, Quan Nguyen wrote: >> >> Update description for X-Gene standby GPIO controller DTS binding to >> >> support GPIO line configuration as input, output or external IRQ pin. >> >> >> >> Signed-off-by: Y Vo >> >> Signed-off-by: Quan Nguyen >> >> --- >> >> .../devicetree/bindings/gpio/gpio-xgene-sb.txt | 47 ++++++++++++++++++---- >> >> 1 file changed, 40 insertions(+), 7 deletions(-) >> >> >> >> diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt >> >> index dae1300..7b8b4cb 100644 >> >> --- a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt >> >> +++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt >> >> @@ -1,10 +1,20 @@ >> >> APM X-Gene Standby GPIO controller bindings >> >> >> >> -This is a gpio controller in the standby domain. >> >> - >> >> -There are 20 GPIO pins from 0..21. There is no GPIO_DS14 or GPIO_DS15, >> >> -only GPIO_DS8..GPIO_DS13 support interrupts. The IRQ mapping >> >> -is currently 1-to-1 on interrupts 0x28 thru 0x2d. >> >> +This is a gpio controller in the standby domain. It also supports interrupt in >> >> +some particular pins which are sourced to its parent interrupt controller >> >> +as diagram below: >> >> + +-----------------+ >> >> + | X-Gene standby | >> >> + | GPIO controller +--------- GPIO_0 >> >> ++------------+ | | ... >> >> +| Parent IRQ | | +--------- GPIO_8/EXT_INT_0 >> >> +| controller | EXT_INT_0 | | ... >> >> +| (GICv2) +-------------+ +--------- GPIO_[N+8]/EXT_INT_N >> >> +| | ... | | >> >> +| | EXT_INT_N | +--------- GPIO_[N+9] >> >> +| +-------------+ | ... >> >> +| | | +--------- GPIO_MAX >> >> ++------------+ +-----------------+ >> >> >> >> Required properties: >> >> - compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller >> >> @@ -15,10 +25,18 @@ Required properties: >> >> 0 = active high >> >> 1 = active low >> >> - gpio-controller: Marks the device node as a GPIO controller. >> >> -- interrupts: Shall contain exactly 6 interrupts. >> >> +- interrupts: The EXT_INT_0 parent interrupt resource must be listed first. >> >> +- interrupt-parent: Phandle of the parent interrupt controller. >> >> +- interrupt-cells: Should be two. >> >> + - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N. >> >> + - second cell is used to specify flags. >> >> +- interrupt-controller: Marks the device node as an interrupt controller. >> >> +- apm,nr-gpios: Optional, specify number of gpios pin. >> >> +- apm,nr-irqs: Optional, specify number of interrupt pins. >> > >> > When is this not 6? >> > >> Hi Rob, by default, this should be 6, but I think this property can >> help in cases: >> + Used only 5(or less) first pin as interrupt. >> + For similar device which has different interrupt pins (8 for example). >> My idea is to make it a bit more generic by using this optional property. > > What is similar device? Another SoC? board? Is 6 fixed in the SoC? I > think you need more specific compatible string with the SoC name in it > to determine these setting rather than trying to do something generic. > I agree, Rob, compatible string should be suit for other SoC, but I think we still need this property for case of less than 6 interrupts are needed. Thanks, -- Quan Nguyen