From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751909AbaEBJTl (ORCPT ); Fri, 2 May 2014 05:19:41 -0400 Received: from mail-vc0-f169.google.com ([209.85.220.169]:53428 "EHLO mail-vc0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751318AbaEBJTj (ORCPT ); Fri, 2 May 2014 05:19:39 -0400 MIME-Version: 1.0 In-Reply-To: <1398690730-5454-1-git-send-email-jean.pihet@linaro.org> References: <1398690730-5454-1-git-send-email-jean.pihet@linaro.org> Date: Fri, 2 May 2014 11:19:38 +0200 Message-ID: Subject: Re: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM64 From: Jean Pihet To: Will Deacon Cc: "linux-kernel@vger.kernel.org" , "linaro-kernel@lists.linaro.org" , "linux-arm-kernel@lists.infradead.org" , Ingo Molnar , Jiri Olsa , Patch Tracking , Arnaldo Carvalho de Melo , Jean Pihet , Steve Capper , Corey Ashford , Frederic Weisbecker , Namhyung Kim , Paul Mackerras , Peter Zijlstra , Arnaldo Carvalho de Melo , David Ahern , Mark Rutland Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi WIll, Mark, Ping on this series. Can you please check? Is the refreshed patch OK? Cheers, Jean On 28 April 2014 15:12, Jean Pihet wrote: > Introducing perf_regs_load function, which is going > to be used for dwarf unwind test in following patches. > > It takes single argument as a pointer to the regs dump > buffer and populates it with current registers values, as > expected by the perf built-in unwinding test. > > Signed-off-by: Jean Pihet > Cc: Steve Capper > Cc: Corey Ashford > Cc: Frederic Weisbecker > Cc: Ingo Molnar > Cc: Namhyung Kim > Cc: Paul Mackerras > Cc: Peter Zijlstra > Cc: Arnaldo Carvalho de Melo > Cc: David Ahern > Cc: Jiri Olsa > --- > tools/perf/arch/arm64/Makefile | 1 + > tools/perf/arch/arm64/include/perf_regs.h | 2 ++ > tools/perf/arch/arm64/tests/regs_load.S | 40 +++++++++++++++++++++++++++++++ > 3 files changed, 43 insertions(+) > create mode 100644 tools/perf/arch/arm64/tests/regs_load.S > > diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile > index 67e9b3d..9b8f87e 100644 > --- a/tools/perf/arch/arm64/Makefile > +++ b/tools/perf/arch/arm64/Makefile > @@ -4,4 +4,5 @@ LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o > endif > ifndef NO_LIBUNWIND > LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o > +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o > endif > diff --git a/tools/perf/arch/arm64/include/perf_regs.h b/tools/perf/arch/arm64/include/perf_regs.h > index 2359546..1e052f1 100644 > --- a/tools/perf/arch/arm64/include/perf_regs.h > +++ b/tools/perf/arch/arm64/include/perf_regs.h > @@ -9,6 +9,8 @@ > #define PERF_REG_IP PERF_REG_ARM64_PC > #define PERF_REG_SP PERF_REG_ARM64_SP > > +void perf_regs_load(u64 *regs); > + > static inline const char *perf_reg_name(int id) > { > switch (id) { > diff --git a/tools/perf/arch/arm64/tests/regs_load.S b/tools/perf/arch/arm64/tests/regs_load.S > new file mode 100644 > index 0000000..40b8b99 > --- /dev/null > +++ b/tools/perf/arch/arm64/tests/regs_load.S > @@ -0,0 +1,40 @@ > +#include > + > +/* > + * Implementation of void perf_regs_load(u64 *regs); > + * > + * This functions fills in the 'regs' buffer from the actual registers values, > + * in the way the perf built-in unwinding test expects them, e.g. an address > + * within the caller: > + * - the PC at the time at the call to this function. Since this function > + * is called using a bl instruction, the PC value is taken from LR, > + * - the current SP (not touched by this function), > + * - the current value of LR is merely retrieved and stored because the > + * value before the call to this function is unknown at this time; it will > + * be unwound from the dwarf information in unwind__get_entries. > + */ > + > +.text > +.type perf_regs_load,%function > +ENTRY(perf_regs_load) > + stp x0, x1, [x0], #16 // store x0..x29 > + stp x2, x3, [x0], #16 > + stp x4, x5, [x0], #16 > + stp x6, x7, [x0], #16 > + stp x8, x9, [x0], #16 > + stp x10, x11, [x0], #16 > + stp x12, x13, [x0], #16 > + stp x14, x15, [x0], #16 > + stp x16, x17, [x0], #16 > + stp x18, x19, [x0], #16 > + stp x20, x21, [x0], #16 > + stp x22, x23, [x0], #16 > + stp x24, x25, [x0], #16 > + stp x26, x27, [x0], #16 > + stp x28, x29, [x0], #16 > + mov x1, sp > + stp x30, x1, [x0], #16 // store lr and sp > + str x30, [x0] // store lr as the PC in order to skip the call > + // to this function > + ret > +ENDPROC(perf_regs_load) > -- > 1.7.11.7 > From mboxrd@z Thu Jan 1 00:00:00 1970 From: jean.pihet@linaro.org (Jean Pihet) Date: Fri, 2 May 2014 11:19:38 +0200 Subject: [PATCH 1/3] perf tests: Introduce perf_regs_load function on ARM64 In-Reply-To: <1398690730-5454-1-git-send-email-jean.pihet@linaro.org> References: <1398690730-5454-1-git-send-email-jean.pihet@linaro.org> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi WIll, Mark, Ping on this series. Can you please check? Is the refreshed patch OK? Cheers, Jean On 28 April 2014 15:12, Jean Pihet wrote: > Introducing perf_regs_load function, which is going > to be used for dwarf unwind test in following patches. > > It takes single argument as a pointer to the regs dump > buffer and populates it with current registers values, as > expected by the perf built-in unwinding test. > > Signed-off-by: Jean Pihet > Cc: Steve Capper > Cc: Corey Ashford > Cc: Frederic Weisbecker > Cc: Ingo Molnar > Cc: Namhyung Kim > Cc: Paul Mackerras > Cc: Peter Zijlstra > Cc: Arnaldo Carvalho de Melo > Cc: David Ahern > Cc: Jiri Olsa > --- > tools/perf/arch/arm64/Makefile | 1 + > tools/perf/arch/arm64/include/perf_regs.h | 2 ++ > tools/perf/arch/arm64/tests/regs_load.S | 40 +++++++++++++++++++++++++++++++ > 3 files changed, 43 insertions(+) > create mode 100644 tools/perf/arch/arm64/tests/regs_load.S > > diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile > index 67e9b3d..9b8f87e 100644 > --- a/tools/perf/arch/arm64/Makefile > +++ b/tools/perf/arch/arm64/Makefile > @@ -4,4 +4,5 @@ LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o > endif > ifndef NO_LIBUNWIND > LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind-libunwind.o > +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/tests/regs_load.o > endif > diff --git a/tools/perf/arch/arm64/include/perf_regs.h b/tools/perf/arch/arm64/include/perf_regs.h > index 2359546..1e052f1 100644 > --- a/tools/perf/arch/arm64/include/perf_regs.h > +++ b/tools/perf/arch/arm64/include/perf_regs.h > @@ -9,6 +9,8 @@ > #define PERF_REG_IP PERF_REG_ARM64_PC > #define PERF_REG_SP PERF_REG_ARM64_SP > > +void perf_regs_load(u64 *regs); > + > static inline const char *perf_reg_name(int id) > { > switch (id) { > diff --git a/tools/perf/arch/arm64/tests/regs_load.S b/tools/perf/arch/arm64/tests/regs_load.S > new file mode 100644 > index 0000000..40b8b99 > --- /dev/null > +++ b/tools/perf/arch/arm64/tests/regs_load.S > @@ -0,0 +1,40 @@ > +#include > + > +/* > + * Implementation of void perf_regs_load(u64 *regs); > + * > + * This functions fills in the 'regs' buffer from the actual registers values, > + * in the way the perf built-in unwinding test expects them, e.g. an address > + * within the caller: > + * - the PC at the time at the call to this function. Since this function > + * is called using a bl instruction, the PC value is taken from LR, > + * - the current SP (not touched by this function), > + * - the current value of LR is merely retrieved and stored because the > + * value before the call to this function is unknown at this time; it will > + * be unwound from the dwarf information in unwind__get_entries. > + */ > + > +.text > +.type perf_regs_load,%function > +ENTRY(perf_regs_load) > + stp x0, x1, [x0], #16 // store x0..x29 > + stp x2, x3, [x0], #16 > + stp x4, x5, [x0], #16 > + stp x6, x7, [x0], #16 > + stp x8, x9, [x0], #16 > + stp x10, x11, [x0], #16 > + stp x12, x13, [x0], #16 > + stp x14, x15, [x0], #16 > + stp x16, x17, [x0], #16 > + stp x18, x19, [x0], #16 > + stp x20, x21, [x0], #16 > + stp x22, x23, [x0], #16 > + stp x24, x25, [x0], #16 > + stp x26, x27, [x0], #16 > + stp x28, x29, [x0], #16 > + mov x1, sp > + stp x30, x1, [x0], #16 // store lr and sp > + str x30, [x0] // store lr as the PC in order to skip the call > + // to this function > + ret > +ENDPROC(perf_regs_load) > -- > 1.7.11.7 >